Texas Instruments

The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This SN74LVC1G139 2-to-4 line decoder is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G139 2-line to 4-line decoder is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When used with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. NanoStar and NanoFree package technology is a major breakthrough in device packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This SN74LVC1G139 2-to-4 line decoder is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G139 2-line to 4-line decoder is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When used with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. NanoStar and NanoFree package technology is a major breakthrough in device packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single Schmitt-trigger inverter is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G14 device contains one inverter and performs the Boolean function Y =A. The device functions as an independent inverter with Schmitt-trigger inputs, so the device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals to provide hysteresis (ΔVT) which makes the device tolerant to slow or noisy input signals. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. This single Schmitt-trigger inverter is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G14 device contains one inverter and performs the Boolean function Y =A. The device functions as an independent inverter with Schmitt-trigger inputs, so the device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals to provide hysteresis (ΔVT) which makes the device tolerant to slow or noisy input signals. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This non-inverting demultiplexer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G18 device is a 1-of-2 non-inverting demultiplexer with a 3-state output. This device buffers the data on input A and passes it to either output Y0 or Y1, depending on whether the state of the select (S) input is low or high, respectively. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This non-inverting demultiplexer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G18 device is a 1-of-2 non-inverting demultiplexer with a 3-state output. This device buffers the data on input A and passes it to either output Y0 or Y1, depending on whether the state of the select (S) input is low or high, respectively. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This decoder/demultiplexer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G19 device is a 1-of-2 decoder / demultiplexer. WhenEinput is high, the decoder will be disabled and both outputs will be high. WhenEinput is low, the A input selects which output will be low. This device is fully specified for partial-power-down applications using Ioff. This decoder/demultiplexer is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G19 device is a 1-of-2 decoder / demultiplexer. WhenEinput is high, the decoder will be disabled and both outputs will be high. WhenEinput is low, the A input selects which output will be low. This device is fully specified for partial-power-down applications using Ioff.

This single buffer/driver is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single buffer/driver is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC1G27 device performs the Boolean function Y =A + B + Cor Y =A•B•Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LVC1G27 device performs the Boolean function Y =A + B + Cor Y =A•B•Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.