SN74LVC1G175 Series

Single D-Type Flip-Flop with Asynchronous Clear

Catalog

Single D-Type Flip-Flop with Asynchronous Clear

Part	Max Propagation Delay @ V, Max CL	Operating Temperature [Min]	Operating Temperature [Max]	Output Type	Current - Quiescent (Iq)	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Capacitance	Current - Output High, Low [y]	Current - Output High, Low [x]	Number of Elements	Mounting Type	Trigger Type	Function	Number of Bits per Element	Type	Package / Case
Texas Instruments 74LVC1G175DCKRG4	4 ns	-40 °C	125 °C	Non-Inverted	10 µA	SC-70-6	5.5 V	1.65 V	3 pF	32 mA	32 mA	1	Surface Mount	Positive Edge	Reset	1	D-Type	6-TSSOP SC-88 SOT-363
Texas Instruments SN74LVC1G175DRYR	5 ns	-40 °C	125 °C	Non-Inverted	10 µA	6-SON (1.45x1)	5.5 V	1.65 V	3 pF	32 mA	32 mA	1	Surface Mount	Positive Edge	Reset	1	D-Type	6-UFDFN
Texas Instruments SN74LVC1G175DBVR	5 ns	-40 °C	125 °C	Non-Inverted	10 µA	SOT-23-6	5.5 V	1.65 V	3 pF	32 mA	32 mA	1	Surface Mount	Positive Edge	Reset	1	D-Type	SOT-23-6
Texas Instruments SN74LVC1G175DCKT	5 ns	-40 °C	125 °C	Non-Inverted	10 µA	SC-70-6	5.5 V	1.65 V	3 pF	32 mA	32 mA	1	Surface Mount	Positive Edge	Reset	1	D-Type	6-TSSOP SC-88 SOT-363
Texas Instruments SN74LVC1G175DCKR	5 ns	-40 °C	125 °C	Non-Inverted	10 µA	SC-70-6	5.5 V	1.65 V	3 pF	32 mA	32 mA	1	Surface Mount	Positive Edge	Reset	1	D-Type	6-TSSOP SC-88 SOT-363

Catalog

Single D-Type Flip-Flop with Asynchronous Clear

Key Features

• Available in the Texas InstrumentsNanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 4.3 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-DownMode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA PerJESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in the Texas InstrumentsNanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMax tpdof 4.3 ns at 3.3 VLow Power Consumption, 10-µA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-DownMode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA PerJESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.