SN74LVC1G132 Series

Single 2-input, 1.65-V to 5.5-V NAND gate with Schmitt-Trigger inputs

Catalog

Single 2-input, 1.65-V to 5.5-V NAND gate with Schmitt-Trigger inputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Package / Case	Mounting Type	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Max Propagation Delay @ V, Max CL	Features	Current - Quiescent (Max) [Max]	Number of Inputs	Current - Output High, Low [y]	Current - Output High, Low [x]	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Number of Circuits	Logic Type	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments 74LVC1G132DCKRG4	125 °C	-40 °C	1.16 V	3.33 V	5-TSSOP SC-70-5 SOT-353	Surface Mount	SC-70-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments SN74LVC1G132DBVTG4	125 °C	-40 °C	1.16 V	3.33 V	SC-74A SOT-753	Surface Mount	SOT-23-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments 74LVC1G132DBVTG4	125 °C	-40 °C	1.16 V	3.33 V	SC-74A SOT-753	Surface Mount	SOT-23-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments 74LVC1G132DCKTG4	125 °C	-40 °C	1.16 V	3.33 V	5-TSSOP SC-70-5 SOT-353	Surface Mount	SC-70-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments SN74LVC1G132DCKR	125 °C	-40 °C	1.16 V	3.33 V	5-TSSOP SC-70-5 SOT-353	Surface Mount	SC-70-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments SN74LVC1G132DCKT	125 °C	-40 °C	1.16 V	3.33 V	5-TSSOP SC-70-5 SOT-353	Surface Mount	SC-70-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments SN74LVC1G132YEPR	85 °C	-40 °C	1.16 V	3.33 V	5-XFBGA DSBGA	Surface Mount	5-DSBGA	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate	1.4	0.9
Texas Instruments SN74LVC1G132DBVT	125 °C	-40 °C	1.16 V	3.33 V	SC-74A SOT-753	Surface Mount	SOT-23-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate
Texas Instruments SN74LVC1G132DBVR	125 °C	-40 °C	1.16 V	3.33 V	SC-74A SOT-753	Surface Mount	SOT-23-5	5.5 V	1.65 V	5 ns	Schmitt Trigger	10 µA	2	32 mA	32 mA	0.39 V	1.87 V	1	NAND Gate

Catalog

Single 2-input, 1.65-V to 5.5-V NAND gate with Schmitt-Trigger inputs

Key Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.3 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.3 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode Operation

Description

The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.