Texas Instruments

The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681. The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681.

The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering. The DAC5682Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681. The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering. The DAC5682Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681.

The DAC5687 is a dual–channel 16–bit high–speed digital–to–analog converter (DAC) with integrated 2×, 4×, and 8× interpolation filters, a complex numerically controlled oscillator (NCO), on–board clock multiplier, IQ compensation, and on–chip voltage reference. The DAC5687 is pin compatible to the DAC5686, requiring only changes in register settings for most applications, and offers additional features and superior linearity, noise, crosstalk, and phase-locked loop (PLL) noise performance. The DAC5687 has six signal processing blocks: two interpolate by two digital filters, a fine–frequency mixer with 32–bit NCO, a quadrature modulation compensation block, another interpolate by two digital filter, and a coarse–frequency mixer with Fs/2 or Fs/4. The different modes of operation enable or bypass the signal processing blocks. The coarse and fine mixers can be combined to span a wider range of frequencies with fine resolution. The DAC5687 allows both complex or real output. Combining the frequency upconversion and complex output produces a Hilbert Transform pair that is output from the two DACs. An external RF quadrature modulator then performs the final single sideband upconversion. The IQ compensation feature allows optimization of phase, gain, and offset to maximize sideband rejection and minimize LO feedthrough for an analog quadrature modulator. The DAC5687 includes several input options: single–port interleaved data, even and odd multiplexing at half rate, and an input FIFO with either external or internal clock to ease the input timing ambiguity when the DAC5687 is clocked at the DAC output sample rate. The DAC5687 is a dual–channel 16–bit high–speed digital–to–analog converter (DAC) with integrated 2×, 4×, and 8× interpolation filters, a complex numerically controlled oscillator (NCO), on–board clock multiplier, IQ compensation, and on–chip voltage reference. The DAC5687 is pin compatible to the DAC5686, requiring only changes in register settings for most applications, and offers additional features and superior linearity, noise, crosstalk, and phase-locked loop (PLL) noise performance. The DAC5687 has six signal processing blocks: two interpolate by two digital filters, a fine–frequency mixer with 32–bit NCO, a quadrature modulation compensation block, another interpolate by two digital filter, and a coarse–frequency mixer with Fs/2 or Fs/4. The different modes of operation enable or bypass the signal processing blocks. The coarse and fine mixers can be combined to span a wider range of frequencies with fine resolution. The DAC5687 allows both complex or real output. Combining the frequency upconversion and complex output produces a Hilbert Transform pair that is output from the two DACs. An external RF quadrature modulator then performs the final single sideband upconversion. The IQ compensation feature allows optimization of phase, gain, and offset to maximize sideband rejection and minimize LO feedthrough for an analog quadrature modulator. The DAC5687 includes several input options: single–port interleaved data, even and odd multiplexing at half rate, and an input FIFO with either external or internal clock to ease the input timing ambiguity when the DAC5687 is clocked at the DAC output sample rate.

The DAC5689 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5689 offers superior linearity, noise and crosstalk performance. The DAC5689 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can be interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation. The DAC5689 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for the natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion. The DAC5689 is pin upgradeable to the DAC5688 which includes a clock multiplying PLL. The DAC5689 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9×9mm QFN package. The DAC5689 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5689 offers superior linearity, noise and crosstalk performance. The DAC5689 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can be interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation. The DAC5689 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for the natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion. The DAC5689 is pin upgradeable to the DAC5688 which includes a clock multiplying PLL. The DAC5689 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9×9mm QFN package.

The DAC80004/70004/60004 (DACx0004) are highly accurate, low-power, voltage-output, quad-channel, 16-, 14-, 12-bit digital-to-analog converters (DACs) respectively. The DACx0004 devices are ensured monotonic by design and offer excellent linearity of less than 1 LSB (Max). The reference input of the DAC is buffered internally using a dedicated reference buffer. The DACx0004 devices incorporate a power-on-reset circuit that ensures the DAC output powers up at zero scale or mid scale depending on status of the POR pin and remains in this state until a valid code is written to the device. These devices consume very low current of 1 mA/channel making them ideal for portable, battery-operated equipment. These devices also contain a power-down feature that reduces current consumption to typically 3 µA at 5 V. The DACx0004 devices use a versatile 4- or 3-wire serial interface that operates at clock rates up to 50 MHz. The DACx0004 devices also include a SDO pin to daisy chain multiple devices. The interface is compatible with standard SPI™, QSPI™, Microwire, and digital signal processor (DSP) interfaces. The DACx0004 devices are offered in easy-to-assemble 14-pin TSSOP packages or an ultra small 14-pin VSON package and are fully specified over the extended industrial temperature range of –40°C to 125°C. The DAC80004/70004/60004 (DACx0004) are highly accurate, low-power, voltage-output, quad-channel, 16-, 14-, 12-bit digital-to-analog converters (DACs) respectively. The DACx0004 devices are ensured monotonic by design and offer excellent linearity of less than 1 LSB (Max). The reference input of the DAC is buffered internally using a dedicated reference buffer. The DACx0004 devices incorporate a power-on-reset circuit that ensures the DAC output powers up at zero scale or mid scale depending on status of the POR pin and remains in this state until a valid code is written to the device. These devices consume very low current of 1 mA/channel making them ideal for portable, battery-operated equipment. These devices also contain a power-down feature that reduces current consumption to typically 3 µA at 5 V. The DACx0004 devices use a versatile 4- or 3-wire serial interface that operates at clock rates up to 50 MHz. The DACx0004 devices also include a SDO pin to daisy chain multiple devices. The interface is compatible with standard SPI™, QSPI™, Microwire, and digital signal processor (DSP) interfaces. The DACx0004 devices are offered in easy-to-assemble 14-pin TSSOP packages or an ultra small 14-pin VSON package and are fully specified over the extended industrial temperature range of –40°C to 125°C.

The DAC60096 is a low-power, fast-settling, 96-channel, 12-bit, digital to analog converter (DAC). The device provides ±10.5-V unbuffered, bipolar voltage outputs. The DAC60096 high-channel count, low-power operation, and good linearity make it an ideal solution in systems where a very high number of precise analog outputs is required. Communication to the device is performed through a high-speed, 4-wire, serial interface compatible with industry standard microprocessors and microcontrollers. The DAC60096 can be set up to clear or update all DACs simultaneously. In addition, a versatile external conversion trigger allows each DAC channel to operate as a square-wave generator with independent amplitude control. The DAC60096 is characterized for operation over the temperature range of –40°C to +85°C, and is available in a 196-ball, 15-mm × 15-mm, 1-mm pitch, BGA package. The DAC60096 is a low-power, fast-settling, 96-channel, 12-bit, digital to analog converter (DAC). The device provides ±10.5-V unbuffered, bipolar voltage outputs. The DAC60096 high-channel count, low-power operation, and good linearity make it an ideal solution in systems where a very high number of precise analog outputs is required. Communication to the device is performed through a high-speed, 4-wire, serial interface compatible with industry standard microprocessors and microcontrollers. The DAC60096 can be set up to clear or update all DACs simultaneously. In addition, a versatile external conversion trigger allows each DAC channel to operate as a square-wave generator with independent amplitude control. The DAC60096 is characterized for operation over the temperature range of –40°C to +85°C, and is available in a 196-ball, 15-mm × 15-mm, 1-mm pitch, BGA package.

The 16-bit DAC80501, 14-bit DAC70501, and 12-bit DAC60501 (DACx0501) digital-to-analog converters (DACs) are highly accurate, low-power devices with voltage-output. The DACx0501 are specified monotonic by design, and offer linearity of < 1 LSB. These devices include a 2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V, 2.5 V, or 5 V. The DACx0501 incorporate a power-on-reset (POR) circuit that makes sure the DAC output powers up at zero scale or midscale, and remains at that scale until a valid code is written to the device. These devices consume a low current of 1 mA, and include a power-down feature that reduces current consumption to typically 15 µA at 5 V. The digital interface of the DACx0501 can be configured to SPI or I 2C mode using the SPI2C pin. In SPI mode, the DACx0501 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. In I 2C mode, the DACx0501 operate in standard mode (100Kbps), fast mode (400Kbps), and fast mode plus (1.0Mbps). The 16-bit DAC80501, 14-bit DAC70501, and 12-bit DAC60501 (DACx0501) digital-to-analog converters (DACs) are highly accurate, low-power devices with voltage-output. The DACx0501 are specified monotonic by design, and offer linearity of < 1 LSB. These devices include a 2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V, 2.5 V, or 5 V. The DACx0501 incorporate a power-on-reset (POR) circuit that makes sure the DAC output powers up at zero scale or midscale, and remains at that scale until a valid code is written to the device. These devices consume a low current of 1 mA, and include a power-down feature that reduces current consumption to typically 15 µA at 5 V. The digital interface of the DACx0501 can be configured to SPI or I 2C mode using the SPI2C pin. In SPI mode, the DACx0501 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. In I 2C mode, the DACx0501 operate in standard mode (100Kbps), fast mode (400Kbps), and fast mode plus (1.0Mbps).

The 16-bit DAC80502, 14-bit DAC70502, and 12-bit DAC60502 (DACx0502) digital-to-analog converters (DACs) are highly accurate, low-power devices with voltage output. The DACx0502 offer linearity of < 1 LSB. The high accuracy combined with tiny package make the DACx0502 an excellent choice for applications such as gain and offset calibration, current or voltage set point generation, and power-supply control. These devices include a 2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V,2.5 V, or 5 V. The DACx0502 incorporate a power-on-reset circuit that makes sure the DAC output powers up at zero scale or midscale based on the status of RSTSEL pin, and remains at that scale until a valid code is written to the device. The digital interface of the DACx0502 can be configured to SPI or I2C mode using the SPI2C pin. In SPI mode, the DACx0502 use a versatile 3-wire serial interface that operates at clock rates up to 50 MHz. In I2C mode, the DACx0502 operate in standard (100 kbps), fast (400 kbps), and fast+ (1.0 Mbps) modes. The 16-bit DAC80502, 14-bit DAC70502, and 12-bit DAC60502 (DACx0502) digital-to-analog converters (DACs) are highly accurate, low-power devices with voltage output. The DACx0502 offer linearity of < 1 LSB. The high accuracy combined with tiny package make the DACx0502 an excellent choice for applications such as gain and offset calibration, current or voltage set point generation, and power-supply control. These devices include a 2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V,2.5 V, or 5 V. The DACx0502 incorporate a power-on-reset circuit that makes sure the DAC output powers up at zero scale or midscale based on the status of RSTSEL pin, and remains at that scale until a valid code is written to the device. The digital interface of the DACx0502 can be configured to SPI or I2C mode using the SPI2C pin. In SPI mode, the DACx0502 use a versatile 3-wire serial interface that operates at clock rates up to 50 MHz. In I2C mode, the DACx0502 operate in standard (100 kbps), fast (400 kbps), and fast+ (1.0 Mbps) modes.