DAC5681Z Series

16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)

Catalog

16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)

Part	Supplied Contents	Data Interface	Number of Bits	DAC Type	Utilized IC / Part	Sampling Rate (Per Second)	Number of DAC's	Settling Time	Package / Case	Supplier Device Package	Reference Type	INL/DNL (LSB)	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Architecture	Output Type	Mounting Type
Texas Instruments DAC5681ZEVM	Board(s)	Parallel Serial	16	Current	DAC5681Z	1 G	1	10.4 ns
Texas Instruments DAC5681IRGCR		LVDS - Parallel	16					10.4 ns	64-VFQFN Exposed Pad	64-VQFN (9x9)	External Internal	2 LSB 4 LSB	1.71 V	2.15 V	85 °C	-40 °C	3.6 V	3 V	Current Sink	Current - Unbuffered	Surface Mount
Texas Instruments DAC5681ZIRGCT		LVDS - Parallel	16					10.4 ns	64-VFQFN Exposed Pad	64-VQFN (9x9)	External Internal	2 LSB 4 LSB	1.7 V	1.9 V	85 °C	-40 °C	3.6 V	3 V	Current Sink	Current - Unbuffered	Surface Mount
Texas Instruments DAC5681IRGC25		LVDS - Parallel	16					10.4 ns	64-VFQFN Exposed Pad	64-VQFN (9x9)	External Internal	2 LSB 4 LSB	1.71 V	2.15 V	85 °C	-40 °C	3.6 V	3 V	Current Sink	Current - Unbuffered	Surface Mount
Texas Instruments DAC5681ZIRGCT		LVDS - Parallel	16					10.4 ns	64-VFQFN Exposed Pad	64-VQFN (9x9)	External Internal	2 LSB 4 LSB	1.7 V	1.9 V	85 °C	-40 °C	3.6 V	3 V	Current Sink	Current - Unbuffered	Surface Mount

Catalog

16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)

Key Features

• 16-Bit Digital-to-Analog Converter (DAC)1.0 GSPS Update Rate16-Bit Wideband Input LVDS Data Bus8 Sample Input FIFOHigh Performance73-dBc ACLR WCDMA TM1 at 180 MHz2x to 32x Clock Multiplying PLL/VCO2x or 4x Interpolation FiltersStopband Transition 0.4–0.6 FdataFilters Configurable in Either Low-Pass orHigh-Pass ModeAllows Selection of Higher Order ImageOn-Chip 1.2-V Reference2 to 20-mA Differential Scalable Output64-Pin 9-mm × 9-mm VQFN PackageAPPLICATIONSCellular Base StationsBroadband Wireless Access (BWA)WiMAX 802.16Fixed Wireless BackhaulCable Modem Termination System (CMTS)All other trademarks are the property of their respective owners16-Bit Digital-to-Analog Converter (DAC)1.0 GSPS Update Rate16-Bit Wideband Input LVDS Data Bus8 Sample Input FIFOHigh Performance73-dBc ACLR WCDMA TM1 at 180 MHz2x to 32x Clock Multiplying PLL/VCO2x or 4x Interpolation FiltersStopband Transition 0.4–0.6 FdataFilters Configurable in Either Low-Pass orHigh-Pass ModeAllows Selection of Higher Order ImageOn-Chip 1.2-V Reference2 to 20-mA Differential Scalable Output64-Pin 9-mm × 9-mm VQFN PackageAPPLICATIONSCellular Base StationsBroadband Wireless Access (BWA)WiMAX 802.16Fixed Wireless BackhaulCable Modem Termination System (CMTS)All other trademarks are the property of their respective owners

Description

The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681. The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance. The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681.