Texas Instruments

The DAC539G2-Q1 is an application-specific, look-up table (LUT) based GPI-to-PWM converter. This device has a 10-bit GPI-to-voltage output converter and a voltage-to-PWM converter. Both these circuits can be externally connected to create a GPI-to-PWM converter. Three GPIs are mapped to eight 10-bit digital codes that represent the voltage output. There is a programmable delay at the GPIs for eliminating glitches on these inputs. The look-up table values are programmed using I 2C or SPI and stored in the NVM. The GPIs are multiplexed with the I 2C and SPI. The voltage-to-PWM converter uses a comparator with one input as a programmable sawtooth or triangle waveform and the other input as an external voltage input. This device automatically detects I 2C and SPI and has an internal reference. The DAC539G2-Q1 is an excellent choice for fault communication in automotive stop and turn lights and similar industrial applications. The DAC539G2-Q1 is an application-specific, look-up table (LUT) based GPI-to-PWM converter. This device has a 10-bit GPI-to-voltage output converter and a voltage-to-PWM converter. Both these circuits can be externally connected to create a GPI-to-PWM converter. Three GPIs are mapped to eight 10-bit digital codes that represent the voltage output. There is a programmable delay at the GPIs for eliminating glitches on these inputs. The look-up table values are programmed using I 2C or SPI and stored in the NVM. The GPIs are multiplexed with the I 2C and SPI. The voltage-to-PWM converter uses a comparator with one input as a programmable sawtooth or triangle waveform and the other input as an external voltage input. This device automatically detects I 2C and SPI and has an internal reference. The DAC539G2-Q1 is an excellent choice for fault communication in automotive stop and turn lights and similar industrial applications.

The DAC5571 is a low-power, single-channel, 8-bit buffered voltage output DAC. Its on-chip precision output amplifier allows rail-to-rail output swing to be achieved. The DAC5571 utilizes an I2C-compatible, two-wire serial interface that operates at clock rates up to 3.4 Mbps with address support of up to two DAC5571s on the same data bus. The output voltage range of the DAC is 0 V to VDD. The DAC5571 incorporates a power-on-reset circuit that ensures that the DAC output powers up at zero volts and remains there until a valid write to the device takes place. The DAC5571 contains a power-down feature, accessed via the internal control register, that reduces the current consumption of the device to 50 nA at 5 V. The low-power consumption of this part in normal operation makes it ideally suited for portable battery operated equipment. The power consumption is less than 0.7 mW at VDD= 5 V reducing to 1 µW in power-down mode. DAC7571/6571/5571 are 12/10/8-bit, single-channel I2C DACs from the same family. DAC7574/6574/5574 and DAC7573/6573/5573 are 12/10/8-bit quad-channel I2C DACs. Also see DAC8571/8574 for single/quad-channel, 16-bit I2C DACs. The DAC5571 is a low-power, single-channel, 8-bit buffered voltage output DAC. Its on-chip precision output amplifier allows rail-to-rail output swing to be achieved. The DAC5571 utilizes an I2C-compatible, two-wire serial interface that operates at clock rates up to 3.4 Mbps with address support of up to two DAC5571s on the same data bus. The output voltage range of the DAC is 0 V to VDD. The DAC5571 incorporates a power-on-reset circuit that ensures that the DAC output powers up at zero volts and remains there until a valid write to the device takes place. The DAC5571 contains a power-down feature, accessed via the internal control register, that reduces the current consumption of the device to 50 nA at 5 V. The low-power consumption of this part in normal operation makes it ideally suited for portable battery operated equipment. The power consumption is less than 0.7 mW at VDD= 5 V reducing to 1 µW in power-down mode. DAC7571/6571/5571 are 12/10/8-bit, single-channel I2C DACs from the same family. DAC7574/6574/5574 and DAC7573/6573/5573 are 12/10/8-bit quad-channel I2C DACs. Also see DAC8571/8574 for single/quad-channel, 16-bit I2C DACs.

The DAC5578 (8 bit), DAC6578 (10 bit), and DAC7578 (12 bit) are low-power, voltage-output, octal channel, digital-to-analog converters (DACs). The devices are monolithic, provide good linearity,and minimize undesired code-to-code transient voltages (glitch). The devices use a versatile, 2-wire serial interface that is I2C-compatible and operates at clock rates of up to 3.4MHz. Multiple devices can share the same bus. The devices incorporate a power-on-reset (POR) circuit that ensures the DAC output powers up to zero-scale or midscale until a valid code is written to the device. These devices also contain a power-down feature, accessed through the serial interface, that reduces the current consumption of the devices to typically 0.42µA at 5V. Power consumption is typically 2.32mW at 3V, reducing to 0.68µW in power-down mode. The low power consumption and small footprint make these devices ideal for portable, battery-operated equipment. The DAC5578, DAC6578, and DAC7578 are drop-in and functionally-compatible with the DAC7678. All devices are available in a 4x4, QFN-24 package and a TSSOP-16 package. The DAC5578 (8 bit), DAC6578 (10 bit), and DAC7578 (12 bit) are low-power, voltage-output, octal channel, digital-to-analog converters (DACs). The devices are monolithic, provide good linearity,and minimize undesired code-to-code transient voltages (glitch). The devices use a versatile, 2-wire serial interface that is I2C-compatible and operates at clock rates of up to 3.4MHz. Multiple devices can share the same bus. The devices incorporate a power-on-reset (POR) circuit that ensures the DAC output powers up to zero-scale or midscale until a valid code is written to the device. These devices also contain a power-down feature, accessed through the serial interface, that reduces the current consumption of the devices to typically 0.42µA at 5V. Power consumption is typically 2.32mW at 3V, reducing to 0.68µW in power-down mode. The low power consumption and small footprint make these devices ideal for portable, battery-operated equipment. The DAC5578, DAC6578, and DAC7578 are drop-in and functionally-compatible with the DAC7678. All devices are available in a 4x4, QFN-24 package and a TSSOP-16 package.

The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported. The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to theDAC2900and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C. The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported. The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to theDAC2900and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C.

The DAC5662 is a monolithic, dual-channel 12-bit high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 275 MSPS, the DAC5662 offers exceptional dynamic performance and tight-gain and offset matching, characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance differential current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5662 has two 12-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5662 also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5662 has been specifically designed for a differential transformer coupled output with a 50-Ω doubly terminated load. For a 20-mA full-scale output current a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (-2 dBm output power) are supported. The DAC5662 is available in a 48-pin thin quad FlatPack (TQFP). Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolution. Furthermore, the DAC5662 is pin compatible to the DAC2902 and AD9765 dual DACs. The device is characterized for operation over the industrial temperature range of -40°C to 85°C. The DAC5662 is a monolithic, dual-channel 12-bit high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 275 MSPS, the DAC5662 offers exceptional dynamic performance and tight-gain and offset matching, characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance differential current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5662 has two 12-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5662 also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5662 has been specifically designed for a differential transformer coupled output with a 50-Ω doubly terminated load. For a 20-mA full-scale output current a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (-2 dBm output power) are supported. The DAC5662 is available in a 48-pin thin quad FlatPack (TQFP). Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolution. Furthermore, the DAC5662 is pin compatible to the DAC2902 and AD9765 dual DACs. The device is characterized for operation over the industrial temperature range of -40°C to 85°C.

The DAC5672 is a monolithic, dual-channel, 14-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 200 MSPS, the DAC5672 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5672 has two 14-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5672 also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5672 has been specifically designed for a differential transformer-coupled output with a 50-doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (-2 dBm output power) are supported. The DAC5672 is available in a 48-pin thin quad flat pack (TQFP) package. Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolution. Furthermore, the DAC5672 is pin compatible to the DAC2904 and AD9767 dual DACs. The device is characterized for operation over the military temperature range of -55°C to 125°C. The DAC5672 is a monolithic, dual-channel, 14-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference. Operating with update rates of up to 200 MSPS, the DAC5672 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications. Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5672 has two 14-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5672 also supports multiplexed data for each DAC on one port when operating in the interleaved mode. The DAC5672 has been specifically designed for a differential transformer-coupled output with a 50-doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (-2 dBm output power) are supported. The DAC5672 is available in a 48-pin thin quad flat pack (TQFP) package. Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolution. Furthermore, the DAC5672 is pin compatible to the DAC2904 and AD9767 dual DACs. The device is characterized for operation over the military temperature range of -55°C to 125°C.

The DAC5675A-SP is a radiation-tolerant, 14-bit resolution high-speed digital-to-analog converter (DAC) primarily suited for space satellite applications. The DAC5675A-SP is designed for high-speed digital data transmission in wired and wireless communication systems, high-frequency direct digital synthesis (DDS), and waveform reconstruction in test and measurement applications. The DAC5675A-SP has excellent SFDR at high intermediate frequencies, which makes it well suited for multicarrier transmission in TDMA and CDMA based cellular base transceiver stations (BTSs). The DAC5675A-SP operates from a single supply voltage of 3.3 V. Power dissipation is 660 mW at ƒCLK= 400 MSPS, ƒOUT= 70 MHz. The DAC5675A-SP provides a nominal full-scale differential current output of 20 mA, supporting both single-ended and differential applications. The output current can be directly fed to the load with no additional external output buffer required. The output is referred to the analog supply voltage AVDD. The DAC5675A-SP includes a low-voltage differential signaling (LVDS) interface for high-speed digital data input. LVDS features a low differential voltage swing with a low constant power consumption across frequency, allowing for high-speed data transmission with low noise levels (low electromagnetic interference (EMI)). LVDS is typically implemented in low-voltage digital CMOS processes, making it the ideal technology for high-speed interfacing between the DAC5675A-SP and high-speed low-voltage CMOS ASICs or FPGAs. The DAC5675A-SP current-source-array architecture supports update rates of up to 400 MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times, thereby relaxing interface timing. The DAC5675A-SP is specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. With the 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm) is supported. The last configuration is preferred for optimum performance at high output frequencies and update rates. The outputs are terminated to AVDD and have voltage compliance ranges from AVDD– 1 to AVDD+ 0.3 V. An accurate on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust this output current from 20 to 2 mA. This provides 20-dB gain range control capabilities. Alternatively, an external reference voltage may be applied. The DAC5675A-SP features a SLEEP mode, which reduces the standby power to approximately 18 mW. The DAC5675A-SP is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The device is specified for operation over the military temperature range of –55°C to 125°C and W temperature range of –55°C to 115°C. The DAC5675A-SP is a radiation-tolerant, 14-bit resolution high-speed digital-to-analog converter (DAC) primarily suited for space satellite applications. The DAC5675A-SP is designed for high-speed digital data transmission in wired and wireless communication systems, high-frequency direct digital synthesis (DDS), and waveform reconstruction in test and measurement applications. The DAC5675A-SP has excellent SFDR at high intermediate frequencies, which makes it well suited for multicarrier transmission in TDMA and CDMA based cellular base transceiver stations (BTSs). The DAC5675A-SP operates from a single supply voltage of 3.3 V. Power dissipation is 660 mW at ƒCLK= 400 MSPS, ƒOUT= 70 MHz. The DAC5675A-SP provides a nominal full-scale differential current output of 20 mA, supporting both single-ended and differential applications. The output current can be directly fed to the load with no additional external output buffer required. The output is referred to the analog supply voltage AVDD. The DAC5675A-SP includes a low-voltage differential signaling (LVDS) interface for high-speed digital data input. LVDS features a low differential voltage swing with a low constant power consumption across frequency, allowing for high-speed data transmission with low noise levels (low electromagnetic interference (EMI)). LVDS is typically implemented in low-voltage digital CMOS processes, making it the ideal technology for high-speed interfacing between the DAC5675A-SP and high-speed low-voltage CMOS ASICs or FPGAs. The DAC5675A-SP current-source-array architecture supports update rates of up to 400 MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times, thereby relaxing interface timing. The DAC5675A-SP is specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. With the 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm) is supported. The last configuration is preferred for optimum performance at high output frequencies and update rates. The outputs are terminated to AVDD and have voltage compliance ranges from AVDD– 1 to AVDD+ 0.3 V. An accurate on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust this output current from 20 to 2 mA. This provides 20-dB gain range control capabilities. Alternatively, an external reference voltage may be applied. The DAC5675A-SP features a SLEEP mode, which reduces the standby power to approximately 18 mW. The DAC5675A-SP is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The device is specified for operation over the military temperature range of –55°C to 125°C and W temperature range of –55°C to 115°C.