Analog Devices

The AD9608 is a monolithic, dual-channel, 1.8 V supply, 10-bit, 105 MSPS/125 MSPS analog-to-digital converter (ADC) that features a high performance sample-and-hold circuit and an on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Logic levels of 1.8 V CMOS and 1.8 V LVDS are supported. Output data can also be multiplexed onto a single output bus.The AD9608 is available in a 64-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTSOperates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or 1.8 V LVDS logic families.The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.Includes a standard serial port interface that supports various product features and functions, such as data output format-ting, internal clock divider, power-down, DCO/data timing, and offset adjustments.Packaged in a 64-lead, RoHS-compliant LFCSP that is pin compatible with theAD9650,AD9269andAD926816-bit ADC’s, theAD9258andAD964814-bit ADC, theAD9628andAD923112-bit ADC’s, and theAD920410-bit ADC’s, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.APPLICATIONSCommunicationsDiversity radio systemsI/Q demodulation systemsBroadband data applicationsBattery-powered instrumentsHand held scope metersPortable medical imagingUltrasound

The AD9613 is a dual 12-bit, analog-to-digital converter (ADC) with sampling speeds up to 250 MSPS. The AD9613 is designed to support communications applications where low cost, small size, wide bandwidth and versatility are desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data are routed directly to the two external 12- bit LVDS output ports and formatted either as interleaved or channel multiplexed.Flexible power-down options allow significant power savings, when desired.Programming for setup and control are accomplished using a 3- wire SPI-compatible serial interface.The AD9613 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTSIntegrated dual, 12-bit, 170 MSPS/210 MSPS/250 MSPS ADCs.Fast overrange and threshold detect.Proprietary differential input maintains excellent SNR performance for input frequencies up to 400 MHz.SYNC input allows synchronization of multiple devices.3-pin, 1.8V SPI port for register programming and register readback.Pin compatibility with the AD9643, allowing a simple migration up to 14 bits, and with theAD6649and theAD6643.ApplicationsCommunicationsDiversity radio systemsMultimode digital receivers (3G)TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTEI/Q demodulation systemsSmart antenna systemsGeneral-purpose software radiosUltrasound equipmentBroadband data applications

The AD9626 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution.The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are CMOS compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced CMOS process, the AD9626 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTSHigh Performance–Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input.Low Power–Consumes only 364 mW @ 250 MSPS.Ease of Use–CMOS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.Serial Port Control–Standard serial port interface supports various product functions, such as data formatting, clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.Pin-Compatible Family–10-bit pin-compatible family offered as the AD9601.APPLICATIONSWireless and wired broadband communicationsCable reverse pathCommunications test equipmentRadar and satellite subsystemsPower amplifier linearization

The AD9627 is a dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS analog-to-digital converter (ADC). The AD9627 is designed to support communications applications where low cost, small size and versatility are desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The AD9627 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with very short latency.In addition, the programmable threshold detector allows monitoring of the incoming signal power, using the four fast detect bits of the ADC with very low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has very low latency, the user can quickly turn down the system gain to avoid an overrange condition.The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.The ADC output data can be routed directly to the two external 12-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or 1.8 V LVDS. Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.The AD9627 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTSIntegrated dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS ADC.Fast overrange detect and signal monitor with serial output.Signal monitor block with dedicated serial output mode.Proprietary differential input that maintains excellent SNR performance for input frequencies up to 450 MHz.Operation from a single 1.8 V supply and a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.Pin compatibility with the AD9640, AD9627-11, and AD9600 for a simple migration from 12 bits to 14 bits, 11 bits, or 10 bits.APPLICATIONSCommunicationsDiversity radio systemsMultimode digital receivers (3G)GSM, EDGE, WCDMA,CDMA2000, WiMAX, TD-SCDMAI/Q demodulation systemsSmart antenna systemsGeneral-purpose software radiosBroadband data applications

The AD9628 is a monolithic, dual-channel, 1.8 V supply, 12-bit, 125 MSPS/105 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. 1.8 V CMOS or LVDS output logic levels are supported. Output data can also be multiplexed onto a single output bus.APPLICATIONSCommunicationsDiversity radio systemsMultimode digital receiversGSM, EDGE, W-CDMA, LTE, CDMA2000, WIMAX, TD-SCDMAI/Q demodulation systemsSmart antenna systemsBroadband data applicationsBattery-powered instrumentsHand-held scope metersPortable medical imagingUltrasoundRadar/LIDARPRODUCT HIGHLIGHTSThe AD9628 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families.The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments.The AD9628 is packaged in a 64-lead RoHS-compliant LFCSP that is pin compatible with theAD9650/AD9269/AD926816-bit ADC, theAD9258/AD9251/AD964814-bit ADCs, the AD9231 12-bit ADC, and theAD9608/AD920410-bit ADCs, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20MSPS to 125MSPS.

The AD9629 is a monolithic, single channel 1.8 V supply, 12-bit, 20 MSPS/40 MSPS/65MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input with optional 1, 2, or 4 divide ratios controls all internal conversion cycles.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.The AD9629 is available in a 32-lead RoHS compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).ApplicationsCommunicationsDiversity radio systemsMultimode digital receiversGSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMASmart antenna systemsBattery-powered instrumentsHand held scope metersPortable medical imagingUltrasoundRadar/LIDARPET/SPECT imagingProduct Highlights1. The AD9629 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.2. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.3. A standard serial port interface (SPI) supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D11 to D0) timing and offset adjustments, and voltage reference modes.4. The AD9629 is packaged in a 32-lead RoHS compliant LFCSP that is pin compatible with the AD9609 10-bit ADC and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 14-bit converters sampling from 20 MSPS to 80 MSPS.

The AD9631/AD9632 are very high speed and wide bandwidth amplifiers. The AD9631 is unity gain stable. The AD9632 is stable at gains of 2 or greater. Using a voltage feedback architecture, the exceptional settling time, bandwidth, and low distortion of the AD9631/AD9632 meet the requirements of many applications that previously depended on current feedback amplifiers. Its classical op amp structure works much more predictably in many designs.A proprietary design architecture has produced an amplifier that combines many of the best characteristics of both current feedback and voltage feedback amplifiers. The AD9631/AD9632 exhibit exceptionally fast and accurate pulse response (16 ns to 0.01%) as well as extremely wide small signal and large signal bandwidth and ultralow distortion. The AD9631 achieves −72 dBc at 20 MHz, 320 MHz small signal bandwidth, and 175 MHz large signal bandwidths.These characteristics position the AD9631/AD9632 ideally for driving flash as well as high resolution ADCs. Additionally, the balanced high impedance inputs of the voltage feedback architecture allow maximum flexibility when designing active filters.The AD9631/AD9632 are offered in the industrial (−40°C to +85°C) temperature range. They are available in PDIP and SOIC.APPLICATIONSADC input driverDifferential amplifiers IF/RF amplifiersPulse amplifiersProfessional videoDAC current to voltageBaseband and video communicationsPin diode receiversActive filters/integrators/log amps