AD9626 Series

12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

Catalog

12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

Part	Number of Inputs	Number of A/D Converters	Input Type	Number of Bits	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Supplier Device Package	Configuration	Ratio - S/H:ADC	Data Interface	Operating Temperature [Max]	Operating Temperature [Min]	Sampling Rate (Per Second)	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Mounting Type	Architecture	Package / Case	Reference Type
Analog Devices AD9626BCPZ-250	1	1	Differential	12 bits	1.9 V	1.7 V	56-LFCSP-VQ (8x8)	S/H-ADC	1:1	LVDS - Parallel	85 °C	-40 °C	250 M	1.7 V	1.9 V	Surface Mount	Pipelined	56-VFQFN Exposed Pad CSP	Internal
Analog Devices AD9626BCPZ-210	1	1	Differential	12 bits	1.9 V	1.7 V	56-LFCSP-VQ (8x8)	S/H-ADC	1:1	LVDS - Parallel	85 °C	-40 °C	210 M per second	1.7 V	1.9 V	Surface Mount	Pipelined	56-VFQFN Exposed Pad CSP	Internal
Analog Devices AD9626BCPZ-170	1	1	Differential	12 bits	1.9 V	1.7 V	56-LFCSP-VQ (8x8)	S/H-ADC	1:1	LVDS - Parallel	85 °C	-40 °C	170 M	1.58 V	1.9 V	Surface Mount	Pipelined	56-VFQFN Exposed Pad CSP	Internal
Analog Devices AD9626BCPZRL7-250	1	1	Differential	12 bits	1.9 V	1.7 V	56-LFCSP-VQ (8x8)	S/H-ADC	1:1	LVDS - Parallel	85 °C	-40 °C	210 M per second	1.7 V	1.9 V	Surface Mount	Pipelined	56-VFQFN Exposed Pad CSP	Internal

Catalog

12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

Key Features

• SNR = 64.8 dBFS @ fINup to 70 MHz @250 MSPS

• ENOB of 10.5 @ fINup to 70 MHz @250 MSPS (−1.0 dBFS)

• SFDR = 80 dBc @ fINup to 70 MHz @250 MSPS (−1.0 dBFS)

• Excellent LinearityDNL = ±0.3 LSB typicalINL = ±0.7 LSB typical

• CMOS outputsSingle data port at up to 250 MHzInterleaved dual port @ 1/2 sample rate up to 125 MHz

• 700 MHz full power analog bandwidth

• On-chip reference, no external decoupling required

• Integrated input buffer and track-and-hold

• Low power dissipation272 mW @ 170 MSPS364 mW @ 250 MSPS

• Programmable input voltage range1.0 V to 1.5 V, 1.25 V nominal

• 1.8 V analog and digital supply operation

• Selectable output data format (offset binary, twos complement, Gray code)

Description

The AD9626 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution.The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are CMOS compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced CMOS process, the AD9626 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTSHigh Performance–Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input.Low Power–Consumes only 364 mW @ 250 MSPS.Ease of Use–CMOS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.Serial Port Control–Standard serial port interface supports various product functions, such as data formatting, clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.Pin-Compatible Family–10-bit pin-compatible family offered as the AD9601.APPLICATIONSWireless and wired broadband communicationsCable reverse pathCommunications test equipmentRadar and satellite subsystemsPower amplifier linearization