Specification	SN74AHCT126PW

Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT126-Q1 Series

Enhanced product 4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Part	Package / Case [x]	Package / Case [y]	Package / Case	Output Type	Number of Elements	Operating Temperature [Min]	Operating Temperature [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Number of Bits per Element	Logic Type	Supplier Device Package	Grade	Qualification	Package / Case [custom]	Package / Case [custom]	Package / Case	Package / Case
Texas Instruments SN74AHCT126D	0.154 in	3.9 mm	14-SOIC	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting
Texas Instruments CAHCT126QWBQARQ1			14-WFDFN Exposed Pad	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount Wettable Flank	1	Buffer Non-Inverting	14-WQFN (3x2.5)	Automotive	AEC-Q100
Texas Instruments CAHCT126QPWRG4Q1			14-TSSOP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting	14-TSSOP	Automotive	AEC-Q100	0.173 "	4.4 mm
Texas Instruments SN74AHCT126QPWREP			14-TSSOP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting	14-TSSOP			0.173 "	4.4 mm
Texas Instruments SN74AHCT126DR	0.154 in	3.9 mm	14-SOIC	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting
Texas Instruments SN74AHCT126DGVR	0.173 in 4.4 mm		14-TFSOP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting
Texas Instruments SN74AHCT126QDRG4Q1	0.154 in	3.9 mm	14-SOIC	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting		Automotive	AEC-Q100
Texas Instruments SN74AHCT126PW			14-TSSOP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting	14-TSSOP			0.173 "	4.4 mm
Texas Instruments SN74AHCT126DBR			14-SSOP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Surface Mount	1	Buffer Non-Inverting	14-SSOP					5.3 mm	0.209 "
Texas Instruments SN74AHCT126N	0.3 "	7.62 mm	14-DIP	3-State	4	-40 °C	125 °C	8 mA	8 mA	4.5 V	5.5 V	Through Hole	1	Buffer Non-Inverting

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.10
		10	$ 0.99
		90	$ 0.77
		270	$ 0.72
		540	$ 0.64
		1080	$ 0.50
		2520	$ 0.47
		5040	$ 0.44
Texas Instruments	TUBE	1	$ 0.82
		100	$ 0.63
		250	$ 0.46
		1000	$ 0.33

Description

General part information

SN74AHCT126-Q1 Series

The SN74AHCT126-Q1 device is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Documents

Technical documentation and resources

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

SN74AHCT126PW

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SN74AHCT126PW

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Technical Specifications

SN74AHCT126-Q1 Series

Pricing

Description

SN74AHCT126-Q1 Series

Documents

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LOGIC Pocket Data Book (Rev. B)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

Logic Guide (Rev. AB)

How to Select Little Logic (Rev. A)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Design Summary for WCSP Little Logic (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

SNx4AHCT126 Quadruple Bus Buffer Gates With 3-State Outputs datasheet (Rev. S)

Live Insertion

TI IBIS File Creation, Validation, and Distribution Processes

AHC/AHCT Designer's Guide February 2000 (Rev. D)

CMOS Power Consumption and CPD Calculation (Rev. B)

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Texas Instruments Little Logic Application Report

Little Logic Guide 2018 (Rev. G)

Selecting the Right Level Translation Solution (Rev. A)

SN74AHCT126-Q1 Series