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14-TSSOP
Integrated Circuits (ICs)

CAHCT126QPWRG4Q1

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Texas Instruments

AUTOMOTIVE 4-CH, 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

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14-TSSOP
Integrated Circuits (ICs)

CAHCT126QPWRG4Q1

Active
Texas Instruments

AUTOMOTIVE 4-CH, 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationCAHCT126QPWRG4Q1
Current - Output High, Low [custom]8 mA
Current - Output High, Low [custom]8 mA
GradeAutomotive
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements4
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case14-TSSOP
Package / Case [custom]0.173 "
Package / Case [custom]4.4 mm
QualificationAEC-Q100
Supplier Device Package14-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.66
10$ 0.58
25$ 0.54
100$ 0.44
250$ 0.41
500$ 0.35
1000$ 0.28
Digi-Reel® 1$ 0.66
10$ 0.58
25$ 0.54
100$ 0.44
250$ 0.41
500$ 0.35
1000$ 0.28
Tape & Reel (TR) 2000$ 0.17
Texas InstrumentsLARGE T&R 1$ 0.45
100$ 0.30
250$ 0.23
1000$ 0.15

Description

General part information

SN74AHCT126-Q1 Series

The SN74AHCT126-Q1 device is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74AHCT126-Q1 device is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.