TPS65281-13A, 4.5V to 18V, Precision Adjustable Current Limited Power Distribution Switch | Evaluation and Demonstration Boards and Kits | 3 | Active | The TPS65281/TPS65281-1 incorporates an N-channel back-to-back power MOSFET switch and a monolithic buck converter. The device is intended to provide a total power distribution solution for digital TV, set-top boxes, tablet PC and VOIP phones etc applications, where precision current limiting is required or heavy capacitive load or short circuit are encountered.
A 100-mΩ independent power distribution switch limits the output current to a programmable current limit threshold between typical 75 mA and 2.7 A by using an external resistor. The current limit accauracy as tight as ±6% can be achieved at higher current limit setting. TPS65281 provides circuit breaker functionality by latching off the power switch during over-current or reverse-voltage situations. TPS65281-1 limits output current to a safe level by using a constant current mode when the output load exceeds the current limit threshold. An internal reverse-voltage comparator disables the power switch when the output voltage is driven higher than the input to protect the device on the input side of the switch in normal operation. The nFAULT output asserts low under over-current and reverse-voltage conditions. Back-to-back power MOSFETs structure prevents the reverse current injection from an active load at output port during shutdown of power switch.
The buck DC/DC converter integrates power MOSFETs for optimized power efficiency and reduced external component count. A wide 4.5-V to 18-V input supply range to buck encompasses most intermediate bus voltages operating off 5-V, 9-V, 12-V or 15-V power bus. Constant frequency peak current mode control simplifies the compensation and provides fast transient response. The buck can be precisely sequenced and ramp up in order to align with other rails in the system with the soft-start pin. With SS pin floating, the built-in 1ms soft-start time prevents in-rush current. Cycle-by-cycle over current protection and hiccup operation limit MOSFET power dissipation in short circuit or over loading fault conditions. The switching frequency of the converter can be programmed from 300 kHz to 1.4 MHz with an external resistor at ROSC pin. With ROSC pin connecting to V7V pin, floating, or grounding, a default fixed switching frequency can be selected to reduce an external resistor.
The TPS65281/TPS65281-1 is available in a 16-lead thermally enhanced QFN (RGV) 4-mm × 4-mm thin package.
The TPS65281/TPS65281-1 incorporates an N-channel back-to-back power MOSFET switch and a monolithic buck converter. The device is intended to provide a total power distribution solution for digital TV, set-top boxes, tablet PC and VOIP phones etc applications, where precision current limiting is required or heavy capacitive load or short circuit are encountered.
A 100-mΩ independent power distribution switch limits the output current to a programmable current limit threshold between typical 75 mA and 2.7 A by using an external resistor. The current limit accauracy as tight as ±6% can be achieved at higher current limit setting. TPS65281 provides circuit breaker functionality by latching off the power switch during over-current or reverse-voltage situations. TPS65281-1 limits output current to a safe level by using a constant current mode when the output load exceeds the current limit threshold. An internal reverse-voltage comparator disables the power switch when the output voltage is driven higher than the input to protect the device on the input side of the switch in normal operation. The nFAULT output asserts low under over-current and reverse-voltage conditions. Back-to-back power MOSFETs structure prevents the reverse current injection from an active load at output port during shutdown of power switch.
The buck DC/DC converter integrates power MOSFETs for optimized power efficiency and reduced external component count. A wide 4.5-V to 18-V input supply range to buck encompasses most intermediate bus voltages operating off 5-V, 9-V, 12-V or 15-V power bus. Constant frequency peak current mode control simplifies the compensation and provides fast transient response. The buck can be precisely sequenced and ramp up in order to align with other rails in the system with the soft-start pin. With SS pin floating, the built-in 1ms soft-start time prevents in-rush current. Cycle-by-cycle over current protection and hiccup operation limit MOSFET power dissipation in short circuit or over loading fault conditions. The switching frequency of the converter can be programmed from 300 kHz to 1.4 MHz with an external resistor at ROSC pin. With ROSC pin connecting to V7V pin, floating, or grounding, a default fixed switching frequency can be selected to reduce an external resistor.
The TPS65281/TPS65281-1 is available in a 16-lead thermally enhanced QFN (RGV) 4-mm × 4-mm thin package. |
| DC/DC & AC/DC (Off-Line) SMPS Evaluation Boards | 1 | Active | |
TPS65283-14.5 V to 18 V input, 3.5 A / 2.5 A, synchronous dual buck converter in FCCM mode | Evaluation Boards | 4 | Active | The TPS65283, TPS65283-1 in thermally-enhanced 4-mm × 4-mm VQFN package is a full featured4.5- to 18-V Vin, 3.5-A/2.5-A output current synchronous step down DC-DC converter, which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. The device also incorporates one N-channel MOSFET power switches for power distribution systems. This device provides a total power distribution solution, where precision current limiting and fast protection response are required.
The 60-mΩ independent power distribution switch limits the output current to a programmable current limit threshold by using an external resistor. The current limit accuracy can be achieved as tight as ±10% at typical 1.25 A. The nFAULT output asserts low under overcurrent and reverse-voltage conditions.
Constant frequency peak current mode control in DC-DC converter simplifies the compensation and optimizes transient response. Cycle-by-cycle overcurrent protection and operating in hiccup mode limit MOSFET power dissipation during buck output short circuit or over loading conditions. When die temperature exceeds thermal over loading threshold, the overtemperature protection shuts down the device.
The TPS65283, TPS65283-1 in thermally-enhanced 4-mm × 4-mm VQFN package is a full featured4.5- to 18-V Vin, 3.5-A/2.5-A output current synchronous step down DC-DC converter, which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. The device also incorporates one N-channel MOSFET power switches for power distribution systems. This device provides a total power distribution solution, where precision current limiting and fast protection response are required.
The 60-mΩ independent power distribution switch limits the output current to a programmable current limit threshold by using an external resistor. The current limit accuracy can be achieved as tight as ±10% at typical 1.25 A. The nFAULT output asserts low under overcurrent and reverse-voltage conditions.
Constant frequency peak current mode control in DC-DC converter simplifies the compensation and optimizes transient response. Cycle-by-cycle overcurrent protection and operating in hiccup mode limit MOSFET power dissipation during buck output short circuit or over loading conditions. When die temperature exceeds thermal over loading threshold, the overtemperature protection shuts down the device. |
| Integrated Circuits (ICs) | 3 | Active | |
TPS652874.5V to 18V input, 3A/2A/2A synchronous buck converter with load switch and push button control | Integrated Circuits (ICs) | 1 | Active | TPS65287 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.
The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements.
All converters have peak current mode control which simplifies external frequency compensation. The device has a built-in slope compensation ramp. The slope compensation can prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.
All converters feature an automatic low power pulse PFM skipping mode which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.
The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 106% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 104%, the high side MOSFET is allowed to turn on the next clock cycle.
TPS65287 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.
The push button operation has been designed to allow for automatic system start when the input supply is applied or to provide an integrated ON/OFF system management without the need of additional external components. The behavior of the device will depend on the status of the INT pin (see start-up signals).
The USB switch provides up to 2.1-A of current as required by downstream USB devices and setting by external resistor. When the output load exceeds the current-limit threshold or a short is present, the PMU limits the output current to a safe level by switching into a constant-current mode and pulling the over current logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal warning protection circuit shuts off the USB switch and allows the buck converters to carry on operating.
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C.
TPS65287 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.
The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements.
All converters have peak current mode control which simplifies external frequency compensation. The device has a built-in slope compensation ramp. The slope compensation can prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.
All converters feature an automatic low power pulse PFM skipping mode which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.
The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 106% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 104%, the high side MOSFET is allowed to turn on the next clock cycle.
TPS65287 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.
The push button operation has been designed to allow for automatic system start when the input supply is applied or to provide an integrated ON/OFF system management without the need of additional external components. The behavior of the device will depend on the status of the INT pin (see start-up signals).
The USB switch provides up to 2.1-A of current as required by downstream USB devices and setting by external resistor. When the output load exceeds the current-limit threshold or a short is present, the PMU limits the output current to a safe level by switching into a constant-current mode and pulling the over current logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal warning protection circuit shuts off the USB switch and allows the buck converters to carry on operating.
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C. |
TPS652884.5V to 18V input, 3A/2A/2A triple synchronous buck converter with dual load switches | Voltage Regulators - DC DC Switching Regulators | 2 | Active | TPS65288 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.
The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements. All converters have peak current mode control which simplifies external frequency compensation.
The device has a built-in slope compensation ramp. The slope compensation can prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.
All converters feature an automatic low power pulse skipping mode (PSM) which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.
The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 106% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 104%, the high side MOSFET is allowed to turn on the next clock cycle.
TPS65288 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.
The 2 USB switches provide up to 1.2A of current as required by downstream USB devices. When the output load exceeds the current-limit threshold or a short is present, the PMU limits the output current to a safe level by switching into a constant-current mode and pulling the over current logic output low. When continuous heavy overloads or short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal warning protection circuit shuts off the USB switch and allows the buck converters to carry on operating.
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C.
TPS65288 is a power management IC with three step-down buck converters. Both high-side and low-side MOSFETs are integrated to provide fully synchronous conversion with higher efficiency. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems. The output voltage can be set externally using a resistor divider to any value between 0.8 V and the input supply minus the resistive drops on the converter path. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIM) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. All converters operate in ‘hiccup mode’: Once an over-current lasting more than 10 ms is sensed in any of the converters, they will shut down for 10 ms and then the start-up sequencing will be tried again. If the overload has been removed, the converter will ramp up and operate normally. If this is not the case the converter will see another over-current event and shuts down again repeating the cycle (hiccup) until the failure is cleared. If an overload condition lasts for less than 10 ms, only the relevant converter affected will shut-down and re-start and no global hiccup mode will occur.
The switching frequency of the converters is set by an external resistor connected to ROSC pin. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. The converters operate with 180° phase between then to minimize the input filter requirements. All converters have peak current mode control which simplifies external frequency compensation.
The device has a built-in slope compensation ramp. The slope compensation can prevent sub harmonic oscillations in peak current mode control. A traditional type II compensation network can stabilize the system and achieve fast transient response. Moreover, an optional capacitor in parallel with the upper resistor of the feedback divider provides one more zero and makes the crossover frequency over 100 kHz.
All converters feature an automatic low power pulse skipping mode (PSM) which improves efficiency during light loads and standby operation, while guaranteeing a very low output ripple, allowing for a value of less than 2% at low output voltages.
The device incorporates an overvoltage transient protection circuit to minimize voltage overshoot. The OVP feature minimizes the output overshoot by implementing a circuit to compare the FB pin voltage to OVP threshold which is 106% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVP lower threshold which is 104%, the high side MOSFET is allowed to turn on the next clock cycle.
TPS65288 features a supervisor circuit which monitors each buck’s output and the PGOOD pin is asserted once sequencing is done. The PGOOD pin is an open drain output. The PGOOD pin is pulled low when any buck converter is pulled below 85% of the nominal output voltage. The PGOOD is pulled up when all converter outputs are more than 90% of its nominal output voltage. The default reset time is 100 ms. The polarity of the PGOOD is active high.
The 2 USB switches provide up to 1.2A of current as required by downstream USB devices. When the output load exceeds the current-limit threshold or a short is present, the PMU limits the output current to a safe level by switching into a constant-current mode and pulling the over current logic output low. When continuous heavy overloads or short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal warning protection circuit shuts off the USB switch and allows the buck converters to carry on operating.
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 160°C. The thermal shutdown forces the device to stop operating when the junction temperature exceeds thermal trip threshold. Once the die temperature decreases below 140°C, the device reinitiates the power up sequence. The thermal shutdown hysteresis is 20°C. |
| Integrated Circuits (ICs) | 5 | Active | |
TPS652954.5-V to 18-V VIN complete DDR4 memory power solution | Integrated Circuits (ICs) | 2 | Active | The TPS65295 device provides a complete power solution for DDR4 memory system with the lowest total cost and minimum space. It meets the JEDEC standard for DDR4 power-up and power-down sequence requirement. The TPS65295 integrates two synchronous buck converters (VPP and VDDQ) and a 1-A sink and source tracking LDO (VTT) and a buffered low noise reference (VTTREF). The TPS65295 employs D-CAP3™ mode coupled with 600-kHz switching frequency for ease-of-use, fast transient, and support for ceramic output capacitors without an external compensation circuit.
The VTTREF tracks ½ VDDQ within excellent 0.8% accuracy. The VTT, which provides both 1-A sink and source continual current capabilities, requires only 10-µF of ceramic output capacitor.
The TPS65295 provides rich functions as well as excellent power supply performance. It supports flexible power state control, placing VTT at high-Z in S3 and discharging VDDQ, VTT, and VTTREF in S4/S5 state. OVP, UVP, OCP, UVLO and thermal shutdown protections are also available. The part is available in a thermally enhanced 18-pin HotRod™ VQFN package and is designed to operate under the –40°C to 125°C junction temperature range.
The TPS65295 device provides a complete power solution for DDR4 memory system with the lowest total cost and minimum space. It meets the JEDEC standard for DDR4 power-up and power-down sequence requirement. The TPS65295 integrates two synchronous buck converters (VPP and VDDQ) and a 1-A sink and source tracking LDO (VTT) and a buffered low noise reference (VTTREF). The TPS65295 employs D-CAP3™ mode coupled with 600-kHz switching frequency for ease-of-use, fast transient, and support for ceramic output capacitors without an external compensation circuit.
The VTTREF tracks ½ VDDQ within excellent 0.8% accuracy. The VTT, which provides both 1-A sink and source continual current capabilities, requires only 10-µF of ceramic output capacitor.
The TPS65295 provides rich functions as well as excellent power supply performance. It supports flexible power state control, placing VTT at high-Z in S3 and discharging VDDQ, VTT, and VTTREF in S4/S5 state. OVP, UVP, OCP, UVLO and thermal shutdown protections are also available. The part is available in a thermally enhanced 18-pin HotRod™ VQFN package and is designed to operate under the –40°C to 125°C junction temperature range. |
TPS652964.5-V to 18-V VIN complete LPDDR4 and LPDDR4X memory power solution | Power Management (PMIC) | 1 | Active | The TPS65296 device provides a complete power solution for LPDDR4/LPDDR4X memory system with the lowest total cost and minimum space. It meets the JEDEC standard for LPDDR4/LPDDR4X power-up and power-down sequence requirement. The TPS65296 integrates two synchronous buck converters (VDD1 and VDD2) and a 1.5-A LDO (VDDQ).
The TPS65296 employs D-CAP3™ mode with 600-kHz switching frequency for fast transient, good load/line regulation, and support for ceramic output capacitors without an external compensation circuit.
The TPS65296 provides rich functions as well as good efficiency with internal low Rdson power MOSFETs. It supports flexible power state control, placing VDDQ at high-Z in S3 and discharging VDD1, VDD2, and VDDQ in S4/S5 state. Full protection features include OVP, UVP, OCP, UVLO and thermal shutdown protection. The part is available in a thermally enhanced 18-pin HotRod™ VQFN package and is designed to operate under the –40°C to 125°C junction temperature range.
The TPS65296 device provides a complete power solution for LPDDR4/LPDDR4X memory system with the lowest total cost and minimum space. It meets the JEDEC standard for LPDDR4/LPDDR4X power-up and power-down sequence requirement. The TPS65296 integrates two synchronous buck converters (VDD1 and VDD2) and a 1.5-A LDO (VDDQ).
The TPS65296 employs D-CAP3™ mode with 600-kHz switching frequency for fast transient, good load/line regulation, and support for ceramic output capacitors without an external compensation circuit.
The TPS65296 provides rich functions as well as good efficiency with internal low Rdson power MOSFETs. It supports flexible power state control, placing VDDQ at high-Z in S3 and discharging VDD1, VDD2, and VDDQ in S4/S5 state. Full protection features include OVP, UVP, OCP, UVLO and thermal shutdown protection. The part is available in a thermally enhanced 18-pin HotRod™ VQFN package and is designed to operate under the –40°C to 125°C junction temperature range. |
| DC/DC & AC/DC (Off-Line) SMPS Evaluation Boards | 1 | Obsolete | |
