| Drivers, Receivers, Transceivers | 1 | Active | The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.
The VBBpin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBBpin is used, place a 0.01-µF decoupling capacitor between VCCand VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.
The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.
The VBBpin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBBpin is used, place a 0.01-µF decoupling capacitor between VCCand VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package. |
SN65ELT205-V TTL to differential PECL translator | Integrated Circuits (ICs) | 4 | Active | The SN65ELT20 is a TTL-to-differential PECL translator. It operates on a 5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.
The SN65ELT20 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.
The SN65ELT20 is a TTL-to-differential PECL translator. It operates on a 5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.
The SN65ELT20 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package. |
| Integrated Circuits (ICs) | 2 | Active | The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. |
SN65ELT225-V dual TTL to differential PECL translator | Integrated Circuits (ICs) | 2 | Active | The SN65ELT22 is a dual TTL-to-differential PECL translator. It operates on +5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.
The SN65ELT22 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65ELT22 is a dual TTL-to-differential PECL translator. It operates on +5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation.
The SN65ELT22 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. |
SN65ELT235-V dual differential PECL buffer to TTL translator | Integrated Circuits (ICs) | 4 | Active | The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. |
| Translators, Level Shifters | 3 | Active | The SN65EPT21 is a differential PECL-to-TTL translator. It operates on +3.3 V supply and ground only. The device includes circuitry to maintain inputs at Vcc/2 when left open.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EPT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65EPT21 is a differential PECL-to-TTL translator. It operates on +3.3 V supply and ground only. The device includes circuitry to maintain inputs at Vcc/2 when left open.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EPT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. |
SN65EPT223.3-V dual LVTTL/LVCMOS to differential LVPECL buffer | Integrated Circuits (ICs) | 3 | Active | The SN65EPT22 is a low power dual LVTTL to LVPECL translator device. The device includes circuitry to maintain known logic HIGH level when inputs are in open condition. The SN65EPT22 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 package option.
The SN65EPT22 is a low power dual LVTTL to LVPECL translator device. The device includes circuitry to maintain known logic HIGH level when inputs are in open condition. The SN65EPT22 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 package option. |
| Integrated Circuits (ICs) | 3 | Active | The SN65EPT23 is a low power dual LVPECL/LVDS to LVTTL/LVCMOS translator device. The device includes circuitry to maintain inputs at Vcc/2 when left open. The SN65EPT23 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 option.
The SN65EPT23 is a low power dual LVPECL/LVDS to LVTTL/LVCMOS translator device. The device includes circuitry to maintain inputs at Vcc/2 when left open. The SN65EPT23 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 option. |
| Evaluation and Demonstration Boards and Kits | 7 | Active | |
SN65HVD013.3-V RS-485 transceiver with 1.65-V I/O supply & selectable data rate | Interface | 2 | Active | The SN65HVD01 is a low-power, 250 kbps or 20 Mbps data rate selectable RS-485 transceiver, utilizing a 1.65-V to 3.6-V supply for data and enable signals, and a 3.3 V ± 10% supply for bus signals. The device is designed for applications requiring synchronous (parallel transceiver) signal timing. On-chip transient suppression protects the device against destructive IEC 61000 ESD and EFT transients.
The device combines a differential driver and a differential receiver, connected internally to form a bus port suitable for half-duplex (two-wire bus) communication. The device features a wide common-mode voltage range making it suitable for multi-point applications over long cable runs. The SN65HVD01 is available in a tiny, 3 mm × 3 mm, SON package with operation characterized from –40°C to 125°C.
The SN65HVD01 is a low-power, 250 kbps or 20 Mbps data rate selectable RS-485 transceiver, utilizing a 1.65-V to 3.6-V supply for data and enable signals, and a 3.3 V ± 10% supply for bus signals. The device is designed for applications requiring synchronous (parallel transceiver) signal timing. On-chip transient suppression protects the device against destructive IEC 61000 ESD and EFT transients.
The device combines a differential driver and a differential receiver, connected internally to form a bus port suitable for half-duplex (two-wire bus) communication. The device features a wide common-mode voltage range making it suitable for multi-point applications over long cable runs. The SN65HVD01 is available in a tiny, 3 mm × 3 mm, SON package with operation characterized from –40°C to 125°C. |
