Texas Instruments

The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications. The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications. The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications. The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD08 combines a 3-state differential line driver and differential line receiver designed for balanced data transmission and interoperation with ANSI TIA/EIA-485-A and ISO-8482E standard-compliant devices. The wide supply voltage range and low quiescent current requirements allow the SN65HVD08s to operate from a 5-V power bus in the cable with as much as a 2-V line voltage drop. Busing power in the cable can alleviate the need for isolated power to be generated at each connection of a ground-isolated bus. The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as a direction control. The SN65HVD08 combines a 3-state differential line driver and differential line receiver designed for balanced data transmission and interoperation with ANSI TIA/EIA-485-A and ISO-8482E standard-compliant devices. The wide supply voltage range and low quiescent current requirements allow the SN65HVD08s to operate from a 5-V power bus in the cable with as much as a 2-V line voltage drop. Busing power in the cable can alleviate the need for isolated power to be generated at each connection of a ground-isolated bus. The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as a direction control.

The SN65HVD09 is a 9-channel RS-422 / RS-485 transceiver suitable for industrial applications. It offers improved switching performance, a small package, and high ESD protection. The precise skew limits ensures that the propagation delay times, not only from channel-to-channel but from device-to-device, are closely matched for the tight skew budgets associated with high-speed parallel data buses. Patented thermal enhancements are used in the thin shrink, small-outline package (TSSOP), allowing operation over the industrial temperature range. The TSSOP package offers very small board area requirements while reducing the package height to 1 mm. This provides more board area and allows component mounting to both sides of the printed circuit boards for low-profile, space-restricted applications such as small form-factor hard disk drives. The HVD09 can withstand electrostatic discharges exceeding 12 kV using the human-body model, and 600 V using the machine model on the RS-485 I/O terminals. This provides protection from the noise that can be coupled into external cables. The other terminals of the device can withstand discharges exceeding 4 kV and 400 V respectively. Each of the nine half-duplex channels of the HVD09 is designed to operate with either RS-422 or RS-485 communication networks. The SN65HVD09 is characterized for operation over an ambient air temperature range of -40°C to 85°C. The SN65HVD09 is a 9-channel RS-422 / RS-485 transceiver suitable for industrial applications. It offers improved switching performance, a small package, and high ESD protection. The precise skew limits ensures that the propagation delay times, not only from channel-to-channel but from device-to-device, are closely matched for the tight skew budgets associated with high-speed parallel data buses. Patented thermal enhancements are used in the thin shrink, small-outline package (TSSOP), allowing operation over the industrial temperature range. The TSSOP package offers very small board area requirements while reducing the package height to 1 mm. This provides more board area and allows component mounting to both sides of the printed circuit boards for low-profile, space-restricted applications such as small form-factor hard disk drives. The HVD09 can withstand electrostatic discharges exceeding 12 kV using the human-body model, and 600 V using the machine model on the RS-485 I/O terminals. This provides protection from the noise that can be coupled into external cables. The other terminals of the device can withstand discharges exceeding 4 kV and 400 V respectively. Each of the nine half-duplex channels of the HVD09 is designed to operate with either RS-422 or RS-485 communication networks. The SN65HVD09 is characterized for operation over an ambient air temperature range of -40°C to 85°C.

The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers all combine a 3-state differential line driver, as well as a differential input line receiver that operates with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits, designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, that can be externally connected together to function as direction control. Very low device standby supply current, can be achieved by disabling the driver and the receiver. The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port, that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC= 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications. The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers all combine a 3-state differential line driver, as well as a differential input line receiver that operates with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits, designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, that can be externally connected together to function as direction control. Very low device standby supply current, can be achieved by disabling the driver and the receiver. The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port, that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC= 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication. The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller. The SN65HVD101 and ’HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults. The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits. The SN65HVD101 and ’HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications. The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication. The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller. The SN65HVD101 and ’HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults. The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits. The SN65HVD101 and ’HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications.

The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication. The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller. The SN65HVD101 and ’HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults. The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits. The SN65HVD101 and ’HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications. The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication. The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller. The SN65HVD101 and ’HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults. The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits. The SN65HVD101 and ’HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications.

The SN65HVD1040 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). As CAN transceivers, these devices provide differential transmit and receive capability for a CAN controller at signaling rates of up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Designed for operation in especially harsh environments, the device features ±12 kV ESD protection on the bus and split pins, cross-wire, overvoltage and loss of ground protection from –27 to 40 V, a –12 V to 12 V common-mode range, and will withstand voltage transients from –200 V to 200 V according to ISO 7637. The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The high-speed mode of operation is selected by connecting STB to ground. If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater than 5 µs on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller may then reactivate the device when it needs to transmit to the bus. A dominant-time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. The SPLIT output (pin 5) is available on the SN65HVD1040 as a VCC/2 common-mode bus voltage bias for a split-termination network. The SN65HVD1040 is characterized for operation from –55°C to 210°C. The SN65HVD1040 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). As CAN transceivers, these devices provide differential transmit and receive capability for a CAN controller at signaling rates of up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Designed for operation in especially harsh environments, the device features ±12 kV ESD protection on the bus and split pins, cross-wire, overvoltage and loss of ground protection from –27 to 40 V, a –12 V to 12 V common-mode range, and will withstand voltage transients from –200 V to 200 V according to ISO 7637. The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The high-speed mode of operation is selected by connecting STB to ground. If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater than 5 µs on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller may then reactivate the device when it needs to transmit to the bus. A dominant-time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. The SPLIT output (pin 5) is available on the SN65HVD1040 as a VCC/2 common-mode bus voltage bias for a split-termination network. The SN65HVD1040 is characterized for operation from –55°C to 210°C.

The SN65HVD1050A-Q1 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications. As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Designed for operation is especially harsh environments, the SN65HVD1050A-Q1 features cross-wire, overvoltage, and loss of ground protection from –27 V to 40 V, overtemperature protection, a –12-V to 12-V common-mode range, and withstands voltage transients according to ISO 7637. Pin 8 provides for two different modes of operation: high-speed or silent mode. The high-speed mode of operation is selected by connecting S (pin 8) to ground. If a high logic level is applied to the S pin of the SN65HVD1050A-Q1, the device enters a listen-only silent mode during which the driver is switched off while the receiver remains fully functional. In silent mode, all bus activity is passed by the receiver output to the local protocol controller. When data transmission is required the local protocol controller must transition the device to high speed mode by placing a logic low on the S pin to resume full operation. A dominant time-out circuit in the SN65HVD1050A-Q1 prevents the driver from blocking network communication with a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. VREF(pin 5) is available as a VCC/ 2 voltage reference. The SN65HVD1050A-Q1 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications. As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Designed for operation is especially harsh environments, the SN65HVD1050A-Q1 features cross-wire, overvoltage, and loss of ground protection from –27 V to 40 V, overtemperature protection, a –12-V to 12-V common-mode range, and withstands voltage transients according to ISO 7637. Pin 8 provides for two different modes of operation: high-speed or silent mode. The high-speed mode of operation is selected by connecting S (pin 8) to ground. If a high logic level is applied to the S pin of the SN65HVD1050A-Q1, the device enters a listen-only silent mode during which the driver is switched off while the receiver remains fully functional. In silent mode, all bus activity is passed by the receiver output to the local protocol controller. When data transmission is required the local protocol controller must transition the device to high speed mode by placing a logic low on the S pin to resume full operation. A dominant time-out circuit in the SN65HVD1050A-Q1 prevents the driver from blocking network communication with a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. VREF(pin 5) is available as a VCC/ 2 voltage reference.