
Catalog
3.3-V ecl differential receiver
Key Features
• Dual 3.3 V Differential LVPECL/LVDS toLVTTL/LVCMOS Buffer Translator24 mA LVTTL OuputsOperating RangeVCC= 3.0 V to 3.6 VGND = 0 VSupport for Clock Frequencies > 300 MHz2.0 ns Typical Propagation DelayBuilt-in Temperature CompensationDrop in Compatible to MC100EPT23APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or DataDual 3.3 V Differential LVPECL/LVDS toLVTTL/LVCMOS Buffer Translator24 mA LVTTL OuputsOperating RangeVCC= 3.0 V to 3.6 VGND = 0 VSupport for Clock Frequencies > 300 MHz2.0 ns Typical Propagation DelayBuilt-in Temperature CompensationDrop in Compatible to MC100EPT23APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or Data
Description
AI
The SN65EPT23 is a low power dual LVPECL/LVDS to LVTTL/LVCMOS translator device. The device includes circuitry to maintain inputs at Vcc/2 when left open. The SN65EPT23 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 option.
The SN65EPT23 is a low power dual LVPECL/LVDS to LVTTL/LVCMOS translator device. The device includes circuitry to maintain inputs at Vcc/2 when left open. The SN65EPT23 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 option.