Catalog
5-V dual differential PECL buffer to TTL translator
Key Features
• Dual 5-V Differential PECL-to-TTL Buffer24-mA TTL OuputsOperating RangePECL VCC= 4.75 V to 5.25 V with GND = 0 VSupport for Clock Frequencies of 250 MHz (TYP)3.5-ns Typical Propagation DelayOutput Default Low with Inputs Left Open or <1.3 VInternal Input 50-kPull-Down ResistorBuilt-In Temperature CompensationDrop-In Compatible to the MC100ELT23APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or DataDual 5-V Differential PECL-to-TTL Buffer24-mA TTL OuputsOperating RangePECL VCC= 4.75 V to 5.25 V with GND = 0 VSupport for Clock Frequencies of 250 MHz (TYP)3.5-ns Typical Propagation DelayOutput Default Low with Inputs Left Open or <1.3 VInternal Input 50-kPull-Down ResistorBuilt-In Temperature CompensationDrop-In Compatible to the MC100ELT23APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or Data
Description
AI
The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65ELT23 is a low power dual PECL-to-TTL translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
