ADC10DV200Dual-Channel, 10-Bit, 200-MSPS Analog-to-Digital Converter (ADC) | Data Acquisition | 2 | Active | The ADC10DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 10-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC10DV200 may be operated from a single 1.8V power supply. The ADC10DV200 achieves approximately 9.6 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode and 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates.
The ADC10DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 10-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC10DV200 may be operated from a single 1.8V power supply. The ADC10DV200 achieves approximately 9.6 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode and 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates. |
| Analog to Digital Converters (ADCs) Evaluation Boards | 3 | Active | |
ADC1175-508-Bit 50MSPS Analog-to-Digital Converter (ADC) | Evaluation Boards | 10 | Active | The ADC1175-50 is a low power, 50 MSPS analog-to-digital converter that digitizes signals to 8 bits while consuming just 125 mW (typ). The ADC1175-50 uses a unique architecture that achieves 6.8 Effective Bits at 25 MHz input and 50 MHz clock frequency. Output formatting is straight binary coding.
The excellent DC and AC characteristics of this device, together with its low power consumption and +5V single supply operation, make it ideally suited for many video and imaging applications, including use in portable equipment. Furthermore, the ADC1175-50 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC1175-50's reference ladder is available for connections, enabling a wide range of input possibilities. The low input capacitance (7 pF, typical) makes this device easier to drive than conventional flash converters and the power down mode reduces power consumption to less than 5 mW.
The ADC1175-50 is offered in 24-pin TSSOP and 24-pin WQFN packages and is designed to operate over the extended commercial temperature range of −20°C to +75°C.
The ADC1175-50 is a low power, 50 MSPS analog-to-digital converter that digitizes signals to 8 bits while consuming just 125 mW (typ). The ADC1175-50 uses a unique architecture that achieves 6.8 Effective Bits at 25 MHz input and 50 MHz clock frequency. Output formatting is straight binary coding.
The excellent DC and AC characteristics of this device, together with its low power consumption and +5V single supply operation, make it ideally suited for many video and imaging applications, including use in portable equipment. Furthermore, the ADC1175-50 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC1175-50's reference ladder is available for connections, enabling a wide range of input possibilities. The low input capacitance (7 pF, typical) makes this device easier to drive than conventional flash converters and the power down mode reduces power consumption to less than 5 mW.
The ADC1175-50 is offered in 24-pin TSSOP and 24-pin WQFN packages and is designed to operate over the extended commercial temperature range of −20°C to +75°C. |
| Integrated Circuits (ICs) | 2 | Obsolete | |
ADC11C12511-Bit, 125MSPS, 1.1GHz Input Bandwidth Analog-to-Digital Converter (ADC) | Data Acquisition | 1 | Active | The ADC11C125 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 11-Bit digital words at rates up to 125 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC11C125 operates from dual +3.3V and +1.8V power supplies and consumes 608 mW of power at 125 MSPS.
The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW while still allowing fast wake-up time to full operation. In addition there is a sleep feature which consumes 50 mW of power and has a faster wake-up time.
The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC11C125 can be operated with an external reference.
Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of input clock duty cycles.
The ADC11C125 is pin compatible with the ADC12C170 and the ADC14155.
It is available in a 48-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.
The ADC11C125 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 11-Bit digital words at rates up to 125 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC11C125 operates from dual +3.3V and +1.8V power supplies and consumes 608 mW of power at 125 MSPS.
The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW while still allowing fast wake-up time to full operation. In addition there is a sleep feature which consumes 50 mW of power and has a faster wake-up time.
The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC11C125 can be operated with an external reference.
Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of input clock duty cycles.
The ADC11C125 is pin compatible with the ADC12C170 and the ADC14155.
It is available in a 48-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C. |
| Development Boards, Kits, Programmers | 3 | Obsolete | |
ADC11DS105Dual-Channel, 11-Bit, 105MSPS Analog-to-Digital Converter (ADC) | Analog to Digital Converters (ADC) | 1 | Active | The ADC11DS105is a high-performance CMOS analog-to-digital converters capable of converting two analog input signals into 11-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC11DS105 may be operated from a single +3.0 or +3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC11DS105 can be operated with an external 1.2V reference. The selectable duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the internal registers for full control of the ADC11DS105's functionality. The ADC11DS105 is available in a 60-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.
The ADC11DS105is a high-performance CMOS analog-to-digital converters capable of converting two analog input signals into 11-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC11DS105 may be operated from a single +3.0 or +3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC11DS105 can be operated with an external 1.2V reference. The selectable duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the internal registers for full control of the ADC11DS105's functionality. The ADC11DS105 is available in a 60-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C. |
ADC11DV200Dual-Channel, 11-Bit, 200MSPS Analog-to-Digital Converter (ADC) | Analog to Digital Converters (ADC) | 2 | Active | The ADC11DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 11-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC11DV200 may be operated from a single 1.8V power supply. The ADC11DV200 achieves approximately 10.06 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates.
The ADC11DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 11-bit digital words at rates up to 200 Mega Samples Per Second (MSPS). The digital output mode is selectable and can be either differential LVDS or CMOS signals. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz. Fabricated in core CMOS process, the ADC11DV200 may be operated from a single 1.8V power supply. The ADC11DV200 achieves approximately 10.06 effective bits at Nyquist and consumes just 280mW at 170MSPS in CMOS mode 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down further by reducing sampling rates. |
ADC1201012-Bit 10MSPS Analog-to-Digital Converter (ADC) | Analog to Digital Converters (ADCs) Evaluation Boards | 18 | Active | The ADC12010 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 10 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 160 mW at 10 MSPS, including the reference current. The Power Down feature reduces power consumption to 25 mW.
The differential inputs provide a full scale input swing equal to 2VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C.
The ADC12010 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 10 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 160 mW at 10 MSPS, including the reference current. The Power Down feature reduces power consumption to 25 mW.
The differential inputs provide a full scale input swing equal to 2VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. |
ADC1202012-Bit 20MSPS Analog-to-Digital Converter (ADC) | Analog to Digital Converters (ADC) | 1 | Active | The ADC12020 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 20 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 185 mW at 20 MSPS, including the reference current. The Power Down feature reduces power consumption to 40 mW.
The differential inputs provide a full scale input swing equal to 2VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C.
The ADC12020 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 20 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 185 mW at 20 MSPS, including the reference current. The Power Down feature reduces power consumption to 40 mW.
The differential inputs provide a full scale input swing equal to 2VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. |
