74ACT574Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs | Flip Flops | 13 | Active | These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. |
74ACT623Octal Non-Inverting Bus Transceivers with 3-State Outputs | Buffers, Drivers, Receivers, Transceivers | 1 | Active | The RCA CD54/74AC623 and CD54/74ACT623 octal-bus transceivers use the RCA ADVANCED CMOS technology. They are non-inverting, 3-state, bidirectional transceiver-buffers that allow for two-way transmission from "A" bus to "B" bus or "B" bus to "A" bus, depending on the logic levels of the Output Enable (OEAB,(OE)\BA) inputs.
The dual Output Enable provision gives these devices the capability to store data by simultaneously enabling OEABand (OE)\BA. Each output reinforces its input under these conditions, and when all other data sources to the bus lines are at high-impedance, both sets of bus lines will remian in their last states.
The CD74AC623 is supplied in 20-lead dual-in-line plastic packages E suffix) and in 20-lead small-outline packages (M, M96, and NSR suffixes). The CD74ACT623 is supplied in 20-lead small-outline packages (M96 suffix). Both package types are operable over the following temperature ranges: Commercial (0 to 70°C); Industrial (–40 to +85°C); and Extended Industrial/Military (–55 to +125°C).
The CD54AC623 and CD54ACT623, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.
The RCA CD54/74AC623 and CD54/74ACT623 octal-bus transceivers use the RCA ADVANCED CMOS technology. They are non-inverting, 3-state, bidirectional transceiver-buffers that allow for two-way transmission from "A" bus to "B" bus or "B" bus to "A" bus, depending on the logic levels of the Output Enable (OEAB,(OE)\BA) inputs.
The dual Output Enable provision gives these devices the capability to store data by simultaneously enabling OEABand (OE)\BA. Each output reinforces its input under these conditions, and when all other data sources to the bus lines are at high-impedance, both sets of bus lines will remian in their last states.
The CD74AC623 is supplied in 20-lead dual-in-line plastic packages E suffix) and in 20-lead small-outline packages (M, M96, and NSR suffixes). The CD74ACT623 is supplied in 20-lead small-outline packages (M96 suffix). Both package types are operable over the following temperature ranges: Commercial (0 to 70°C); Industrial (–40 to +85°C); and Extended Industrial/Military (–55 to +125°C).
The CD54AC623 and CD54ACT623, available in chip form (H suffix), are operable over the -55 to +125°C temperature range. |
| Integrated Circuits (ICs) | 2 | Obsolete | |
74ACT652Octal Non-Inverting Bus Transceivers/Registers with 3-State Outputs | Buffers, Drivers, Receivers, Transceivers | 2 | Obsolete | The RCA CD54/74AC651 and CD54/74AC652 and the CD54/74ACT651 and CD54/74ACT652 3-state, octal-bus transceiver/registers use the RCA ADVANCED CMOS technology. The CD54/74AC651 and CD54/74ACT651 have inverting outputs. The CD54/74AC562 and CD54/74ACT652 have non-inverting outputs. These devices consist of bus tranceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output Enables OEABand OE\BAare provided to control the transceiver functions. SAB and SBA control pins are provided to select whether real-time or stored data is transferred. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A LOW input level selects real-time data, and a HIGH selects stored data. The following examples demonstrate the four fundamental bus-management functions that can be performed with the octal-bus transceivers and registers.
Data on the A or B data bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock pins (CAB or CBA) regardless of the select or enable control pins. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEABand OE\BA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are a high impedance, each set of bus lines will remain at its last state.
The CD74AC/ACT651 and CD74AC/ACT652 are supplied in 24-lead dual-in-line narrow-body plastic packages (EN suffix) and in 24-lead dual-in-line small-outline plastic packages (M suffix). Both package ty0es are operable over the following temperature ranges. Commerical (0 to 70°C); industrial (-40 to +85°C); and Extended Industrial/Military (-55 to +125°C).
The CD54AC/ACT651 and CD54AC/ACT652, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.
The RCA CD54/74AC651 and CD54/74AC652 and the CD54/74ACT651 and CD54/74ACT652 3-state, octal-bus transceiver/registers use the RCA ADVANCED CMOS technology. The CD54/74AC651 and CD54/74ACT651 have inverting outputs. The CD54/74AC562 and CD54/74ACT652 have non-inverting outputs. These devices consist of bus tranceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output Enables OEABand OE\BAare provided to control the transceiver functions. SAB and SBA control pins are provided to select whether real-time or stored data is transferred. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A LOW input level selects real-time data, and a HIGH selects stored data. The following examples demonstrate the four fundamental bus-management functions that can be performed with the octal-bus transceivers and registers.
Data on the A or B data bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock pins (CAB or CBA) regardless of the select or enable control pins. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEABand OE\BA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are a high impedance, each set of bus lines will remain at its last state.
The CD74AC/ACT651 and CD74AC/ACT652 are supplied in 24-lead dual-in-line narrow-body plastic packages (EN suffix) and in 24-lead dual-in-line small-outline plastic packages (M suffix). Both package ty0es are operable over the following temperature ranges. Commerical (0 to 70°C); industrial (-40 to +85°C); and Extended Industrial/Military (-55 to +125°C).
The CD54AC/ACT651 and CD54AC/ACT652, available in chip form (H suffix), are operable over the -55 to +125°C temperature range. |
| Integrated Circuits (ICs) | 5 | Active | |
| FIFOs Memory | 18 | Active | |
| Integrated Circuits (ICs) | 9 | Active | |
| Integrated Circuits (ICs) | 5 | Active | |
| Logic | 12 | Active | |
| Logic | 7 | Active | |
