Analog Devices

The AD9251 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported and output data can be multiplexed onto a single output bus.The AD9251 is available in a 64-lead RoHS Compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTSThe AD9251 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/DATA timing and offset adjustments, and voltage reference modes.The AD9251 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9268 16-bit ADC, the AD9258 14-bit ADC, the AD9231 12-bit ADC, and the AD9204 10-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.APPLICATIONSCommunicationsDiversity radio systemsMultimode digital receiversGSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMAI/Q demodulation systemsSmart antenna systemsBattery-powered instrumentsHand held scope metersPortable medical imagingUltrasoundRadar/LIDAR

The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9253 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTSSmall Footprint. Four ADCs are contained in a small, spacesaving package.Low power of 110 mW/channel at 125 MSPS with scalable power options.Pin compatible to the AD9633 12-bit quad ADC.Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation.User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirementsAPPLICATIONSMedical ultrasoundHigh speed imagingQuadrature and diversity radio receiversTest equipment

The AD9254 is a monolithic, single 1.8 V supply, 14-bit, 150 MSPS analog-to-digital converter (ADC), featuring a high performance sample-and-hold amplifier (SHA) and on-chip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 150 MSPS data rates and guarantees no missing codes over the full operating temperature range.The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9254 is suitable for applications in communications, imaging, and medical ultrasound.A differential clock input controls all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic.The AD9254 is available in a 48-lead LFCSP_VQ and is specified over the industrial temperature range (−40°C to +85°C).ul.noindent { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:15px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li.noindent { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;} ol class="noindent"> { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:25px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li class="noindent">{ padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;}Product HighlightsThe AD9254 operates from a single 1.8 V power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.The patented SHA input maintains excellent performance for input frequencies up to 225 MHz.The clock DCS maintains overall ADC performance over a wide range of clock pulse widths.A standard serial port interface supports various product features and functions, such as data formatting (offset binary, twos complement, or Gray coding), enabling the clock DCS, power-down, and voltage reference mode.The AD9254 is pin-compatible with the AD9233, allowing a simple migration from 12 bits to 14 bits.APPLICATIONSUltrasound equipmentIF sampling in communications receiversCDMA2000, WCDMA, TD-SCDMA, and WiMaxBattery-powered instrumentsHand-held scopemetersLow cost digital oscilloscopesMacro, micro, and pico cell infrastructure

The AD9255 is a 14-bit, 125 MSPS analog-to-digital converter (ADC). The AD9255 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9255 is suitable for applications in communications, instrumentation, and medical imaging.A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9255 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTSOn-chip dither option for improved SFDR performance with low power analog input.Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.Pin compatibility with the AD9265, allowing a simple migration up to 16 bits.ApplicationsCommunicationsMultimode digital receivers (3G)GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMASmart antenna systemsGeneral-purpose software radiosBroadband data applicationsUltrasound equipment

The AD9257 is an octal, 14-bit, 40 MSPS and 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9257 is available in an RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.APPLICATIONSMedical imaging and nondestructive ultrasoundPortable ultrasound and digital beam-forming systemsQuadrature and diversity radio receiversOptical networkingTest equipmentPRODUCT HIGHLIGHTSSmall Footprint. Eight ADCs are contained in a small, space-saving package.Low Power of 55 mW/Channel at 65 MSPS with Scalable Power Options.Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 455 MHz and supports double data rate (DDR) operation.User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.Pin Compatible with the AD9637 (12-Bit Octal ADC).

The AD9257S-CSL is an octal, 14-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and low voltage, positive emitter-coupled logic (LVPECL)-/ CMOS-/low voltage differential signaling (LVDS)-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes 1 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9257S-CSL is available in an RoHS-compliant, 64-lead lead frame chip scale package (LFCSP). The device is specified over the −55°C to +125°C temperature range. This product is protected by a U.S. patent. Additional application and technical information can be found in the Commercial Space Products Program brochure and the AD9257 data sheet.PRODUCT HIGHLIGHTSSmall Footprint. Eight ADCs are contained in a small, space-saving package.Low Power of 55 mW/Channel at 65 MSPS with Scalable Power Options.Ease of Use. A DCO is provided that operates at frequencies of up to 455 MHz and supports double data rate (DDR) operation.User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.Pin Compatible with the AD9637 (12-Bit Octal ADC).APPLICATIONSLow Earth orbit (LEO) space payloadsQuadrature and diversity radio receiverOptical imaging

The AD9258 is a dual, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9258 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 14-bit output ports. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9258 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTSOn-chip dither option for improved SFDR performance with low power analog input.Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.Pin compatibility with the AD9268, allowing a simple migration from 14 bits to 16 bits. The AD9258 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.APPLICATIONSCommunicationsDiversity radio systemsMultimode digital receivers (3G)GSM, EDGE, W-CDMA, LTE,CDMA2000, WiMAX, TD-SCDMAI/Q demodulation systemsSmart antenna systemsGeneral-purpose software radiosBroadband data applicationsUltrasound Equipment

The AD9260 is a 16-bit, high speed oversampled analog-to-digital converter (ADC) that offers exceptional dynamic range over a wide bandwidth. The AD9260 is manufactured on an advanced CMOS process. High dynamic range is achieved with an oversampling ratio of 8X through the use of a proprietary technique which combines the advantages of sigma-delta and pipeline converter technologies.The AD9260 is a switched-capacitor ADC with a nominal full-scale input range of 4V. It offers a differential input with 60dB of common mode rejection of common mode signals. The signal range of each differential input is +/- 1V centered on a 2.0V common -mode level.The on-chip decimation filter is configured for maximum performance and flexibility. A series of three half-band FIR filter stages provide 8X decimation filtering with 85 dB of stopband attenuation and 0.004dB of passband ripple. An on-board digital multiplexer allows the user to access data from the various stages of the decimation filter. The on-chip programmable reference and reference buffer amplifier are configured for maximum accuracy and flexibility. An external reference can also be chosen to suit the users specific dc accuracy and drift requirements.The AD9260 operates on a single +5V supply, typically consuming 550mW of power. A power scaling circuit is provided allowing the AD9260 to operate at power consumption levels as low as 150mW at reduced clock and data rates. The AD9260 is available in a 44-pin MQFP package and is specified to operate over the industrial temperature range.