AD9258 Series

14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

Catalog

14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

Part	Configuration	Operating Temperature [Max]	Operating Temperature [Min]	Reference Type	Input Type	Number of A/D Converters	Mounting Type	Package / Case	Sampling Rate (Per Second)	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Number of Inputs	Architecture	Ratio - S/H:ADC	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Features	Data Interface	Supplier Device Package	Number of Bits
Analog Devices AD9258BCPZ-105	S/H-ADC	85 °C	-40 °C	External Internal	Differential	2	Surface Mount	64-VFQFN Exposed Pad CSP	105 M	1.7 V	1.9 V	2	Pipelined	1:1	1.9 V	1.7 V	Simultaneous Sampling	LVDS - Parallel	64-LFCSP-VQ (9x9)	14

Catalog

14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

Key Features

• SNR = 77.6 dBFS @ 70 MHz and 125 MSPS

• SFDR = 88 dBc @ 70 MHz and 125 MSPS

• Low power: 750 mW @ 125 MSPS

• 1.8 V analog supply operation

• 1.8 V CMOS or LVDS output supply

• Integer 1-to-8 input clock divider

• Integrated ADC sample-and-hold inputs

• IF sampling frequencies to 300 MHz

• −152.8 dBm/Hz small signal input noise with 200 Ω input impedance @ 70 MHz and 125 MSPS

• Optional on-chip dither

• Programmable internal ADC voltage reference

• See data sheet for additional features

Description

The AD9258 is a dual, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9258 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 14-bit output ports. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9258 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTSOn-chip dither option for improved SFDR performance with low power analog input.Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.Pin compatibility with the AD9268, allowing a simple migration from 14 bits to 16 bits. The AD9258 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.APPLICATIONSCommunicationsDiversity radio systemsMultimode digital receivers (3G)GSM, EDGE, W-CDMA, LTE,CDMA2000, WiMAX, TD-SCDMAI/Q demodulation systemsSmart antenna systemsGeneral-purpose software radiosBroadband data applicationsUltrasound Equipment