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14-TSSOP
Integrated Circuits (ICs)

SN74LV10APWT

Obsolete
Texas Instruments

IC GATE NAND 3CH 3-INP 14TSSOP

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14-TSSOP
Integrated Circuits (ICs)

SN74LV10APWT

Obsolete
Texas Instruments

IC GATE NAND 3CH 3-INP 14TSSOP

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Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LV10APWT
Current - Output High, Low [custom]12 mA
Current - Output High, Low [custom]12 mA
Current - Quiescent (Max) [Max]20 µA
Input Logic Level - High1.5 V
Input Logic Level - Low0.5 V
Logic TypeNAND Gate
Max Propagation Delay @ V, Max CL7.9 ns
Mounting TypeSurface Mount
Number of Circuits3
Number of Inputs3
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case14-TSSOP
Package / Case [custom]0.173 "
Package / Case [custom]4.4 mm
Supplier Device Package14-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2 V

SN74LV10A Series

3-ch, 3-input, 2-V to 5.5-V NAND gates

PartVoltage - Supply [Max]Voltage - Supply [Min]Logic TypeInput Logic Level - HighInput Logic Level - LowMax Propagation Delay @ V, Max CLCurrent - Quiescent (Max) [Max]Mounting TypeSupplier Device PackageCurrent - Output High, Low [custom]Current - Output High, Low [custom]Number of CircuitsPackage / Case [custom]Package / Case [custom]Package / CaseNumber of InputsOperating Temperature [Max]Operating Temperature [Min]Package / CasePackage / CasePackage / Case [x]Package / Case [y]
14-TSSOP
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-TSSOP
12 mA
12 mA
3
0.173 "
4.4 mm
14-TSSOP
3
85 °C
-40 °C
Texas Instruments-SN74LV27ADBR Logic Gates NOR Gate 3-Element 3-IN CMOS 14-Pin SSOP T/R
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-SSOP
12 mA
12 mA
3
14-SSOP
3
85 °C
-40 °C
5.3 mm
0.209 "
14-SOIC
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
12 mA
12 mA
3
14-SOIC
3
85 °C
-40 °C
0.154 in
3.9 mm
Product Image
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-SO
12 mA
12 mA
3
14-SOIC
3
85 °C
-40 °C
0.209 "
5.3 mm
Texas Instruments-SN65HVD1792TDEP Bus Line Transceivers Single Transmitter/Receiver RS-422/RS-485 14-Pin SOIC Tube
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
12 mA
12 mA
3
14-SOIC
3
85 °C
-40 °C
0.154 in
3.9 mm
14-TVSOP
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
12 mA
12 mA
3
14-TFSOP
3
85 °C
-40 °C
0.173 in
4.4 mm
TSSOP (PW)
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-TSSOP
12 mA
12 mA
3
0.173 "
4.4 mm
14-TSSOP
3
85 °C
-40 °C
14-SOIC
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
12 mA
12 mA
3
14-SOIC
3
85 °C
-40 °C
0.154 in
3.9 mm
14-TSSOP
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-TSSOP
12 mA
12 mA
3
0.173 "
4.4 mm
14-TSSOP
3
85 °C
-40 °C
14-TSSOP
Texas Instruments
5.5 V
2 V
NAND Gate
1.5 V
0.5 V
7.9 ns
20 µA
Surface Mount
14-TSSOP
12 mA
12 mA
3
0.173 "
4.4 mm
14-TSSOP
3
85 °C
-40 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 1250$ 0.36
2500$ 0.32
6250$ 0.30
12500$ 0.29
31250$ 0.28

Description

General part information

SN74LV10A Series

These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCCoperation. The SN74LV10A devices perform the Boolean function Y =A • B • Cin positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCCoperation. The SN74LV10A devices perform the Boolean function Y =A • B • Cin positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

Documents

Technical documentation and resources

No documents available