SN74LV10A Series

3-ch, 3-input, 2-V to 5.5-V NAND gates

Catalog

3-ch, 3-input, 2-V to 5.5-V NAND gates

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Logic Type	Input Logic Level - High	Input Logic Level - Low	Max Propagation Delay @ V, Max CL	Current - Quiescent (Max) [Max]	Mounting Type	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Circuits	Package / Case [custom]	Package / Case [custom]	Package / Case	Number of Inputs	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case	Package / Case [x]	Package / Case [y]
Texas Instruments SN74LV10APWRG4	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-TSSOP	12 mA	12 mA	3	0.173 "	4.4 mm	14-TSSOP	3	85 °C	-40 °C
Texas Instruments SN74LV10ADBR	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-SSOP	12 mA	12 mA	3			14-SSOP	3	85 °C	-40 °C	5.3 mm	0.209 "
Texas Instruments SN74LV10ADRG4	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount		12 mA	12 mA	3			14-SOIC	3	85 °C	-40 °C			0.154 in	3.9 mm
Texas Instruments SN74LV10ANSR	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-SO	12 mA	12 mA	3			14-SOIC	3	85 °C	-40 °C			0.209 "	5.3 mm
Texas Instruments SN74LV10AD	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount		12 mA	12 mA	3			14-SOIC	3	85 °C	-40 °C			0.154 in	3.9 mm
Texas Instruments SN74LV10ADGVRE4	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount		12 mA	12 mA	3			14-TFSOP	3	85 °C	-40 °C			0.173 in 4.4 mm
Texas Instruments SN74LV10APWR	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-TSSOP	12 mA	12 mA	3	0.173 "	4.4 mm	14-TSSOP	3	85 °C	-40 °C
Texas Instruments SN74LV10ADR	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount		12 mA	12 mA	3			14-SOIC	3	85 °C	-40 °C			0.154 in	3.9 mm
Texas Instruments SN74LV10APWT	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-TSSOP	12 mA	12 mA	3	0.173 "	4.4 mm	14-TSSOP	3	85 °C	-40 °C
Texas Instruments SN74LV10APW	5.5 V	2 V	NAND Gate	1.5 V	0.5 V	7.9 ns	20 µA	Surface Mount	14-TSSOP	12 mA	12 mA	3	0.173 "	4.4 mm	14-TSSOP	3	85 °C	-40 °C

Catalog

3-ch, 3-input, 2-V to 5.5-V NAND gates

Key Features

• VCCoperation of 2 V to 5.5 VMax tpdof 7 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 V at VCC= 3.3 V, TA = 25°CIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIVCCoperation of 2 V to 5.5 VMax tpdof 7 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 V at VCC= 3.3 V, TA = 25°CIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Description

These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCCoperation. The SN74LV10A devices perform the Boolean function Y =A • B • Cin positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCCoperation. The SN74LV10A devices perform the Boolean function Y =A • B • Cin positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.