DRV896265-V four-channel half-bridge driver with current sense outputs | Power Management (PMIC) | 2 | Active | The DRV8962 is a wide-voltage, high-power, four-channel half-bridge driver for a wide variety of industrial applications. The device supports up to 65-V supply voltage, and integrated MOSFETs with 50 mΩ on-resistance allow up to 5-A current on each output with the DDW package; and up to 10-A current per output with the DDV package.
The device can be used for driving up to four solenoids or valves, one stepper motor, two brushed-DC motors, one BLDC or PMSM motor and up to two thermoelectric coolers (Peltier elements). The output stage of the device consists of N-channel power MOSFETs configured as four independent half-bridges, charge pump regulator, current sensing and regulation circuits, current sense outputs and protection circuitry.
Integrated current sensing across the high-side MOSFETs allows the device to regulate the current when the load is connected from output to ground. A regulation current limit can be set with an adjustable external voltage reference (VREF). Additionally, the device provides four proportional current output pins, one for each half-bridge high-side FET. Optional external sense resistors can also be connected from the PGND pins to the system ground.
A low-power sleep mode is provided to achieve ultra- low quiescent current. Internal protection features are provided for supply undervoltage lockout (UVLO), charge pump undervoltage (CPUV), output over current (OCP), and device overtemperature (OTSD).
The DRV8962 is a wide-voltage, high-power, four-channel half-bridge driver for a wide variety of industrial applications. The device supports up to 65-V supply voltage, and integrated MOSFETs with 50 mΩ on-resistance allow up to 5-A current on each output with the DDW package; and up to 10-A current per output with the DDV package.
The device can be used for driving up to four solenoids or valves, one stepper motor, two brushed-DC motors, one BLDC or PMSM motor and up to two thermoelectric coolers (Peltier elements). The output stage of the device consists of N-channel power MOSFETs configured as four independent half-bridges, charge pump regulator, current sensing and regulation circuits, current sense outputs and protection circuitry.
Integrated current sensing across the high-side MOSFETs allows the device to regulate the current when the load is connected from output to ground. A regulation current limit can be set with an adjustable external voltage reference (VREF). Additionally, the device provides four proportional current output pins, one for each half-bridge high-side FET. Optional external sense resistors can also be connected from the PGND pins to the system ground.
A low-power sleep mode is provided to achieve ultra- low quiescent current. Internal protection features are provided for supply undervoltage lockout (UVLO), charge pump undervoltage (CPUV), output over current (OCP), and device overtemperature (OTSD). |
| Clock/Timing | 1 | Obsolete | |
DS08MB200Dual 800-Mbps 2:1/1:2 LVDS mux/buffer | Signal Buffers, Repeaters, Splitters | 1 | Active | The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.
The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range.
The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.
The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range. |
| Evaluation Boards | 6 | Active | |
DS100BR111A10.3-Gbps ultra low power 2-ch redriver with input equalization and output de-emphasis | Evaluation Boards | 4 | Active | The DS100BR111 is an extremely low power, high performance repeater designed to support serial links with data rates up to 10.3 Gbps. The DS100BR111 pinout is configured as one bidirectional lane (one transmit, one receive channel). The DS100BR111 inputs feature a powerful 4-stage continuous time linear equalizer (CTLE) to provide a boost of up to +36 dB at 5 GHz and open an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect mediums such as board traces or twin-axial copper cables. The transmitter features a programmable output de-emphasis driver with up to –12 dB and can drive output voltage levels from 700 mVp-p to 1300 mVp-p.
When configured as a 10G-KR repeater, the DS100BR111 allows the KR host and the end point to optimize the full link by adjusting transmit and receive equalizer coefficients using back-channel communication techniques specified by the 802.3ap Ethernet standard.
The programmable settings can be applied via pin control, SMBus protocol, or an external EEPROM. In the EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.
The DS100BR111 is an extremely low power, high performance repeater designed to support serial links with data rates up to 10.3 Gbps. The DS100BR111 pinout is configured as one bidirectional lane (one transmit, one receive channel). The DS100BR111 inputs feature a powerful 4-stage continuous time linear equalizer (CTLE) to provide a boost of up to +36 dB at 5 GHz and open an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect mediums such as board traces or twin-axial copper cables. The transmitter features a programmable output de-emphasis driver with up to –12 dB and can drive output voltage levels from 700 mVp-p to 1300 mVp-p.
When configured as a 10G-KR repeater, the DS100BR111 allows the KR host and the end point to optimize the full link by adjusting transmit and receive equalizer coefficients using back-channel communication techniques specified by the 802.3ap Ethernet standard.
The programmable settings can be applied via pin control, SMBus protocol, or an external EEPROM. In the EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver. |
DS100BR21010.3-Gbps low power 2-ch redriver w/ input equalization and output de-emphasis | Integrated Circuits (ICs) | 2 | Active | The DS100BR210 is an extremely low power, high performance repeater designed to support serial links with data rates up to 10.3 Gbps. The DS100BR210 pinout is configured as two unidirectional channels. The DS100BR210 inputs feature a powerful 4-stage continuous time linear equalizer (CTLE) to provide a boost of up to +36 dB at 5 GHz and open an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect mediums such as board traces or twin-axial copper cables. The transmitter features a programmable output de-emphasis driver with up to –12 dB and can drive output voltage levels from 700 mVp-p to 1300 mVp-p.
When configured as a 10G-KR repeater, the DS100BR210 allows the KR host and the end point to optimize the full link by adjusting transmit and receive equalizer coefficients using back-channel communication techniques specified by the 802.3ap Ethernet standard.
The programmable settings can be applied via pin control, SMBus protocol, or an external EEPROM. In the EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.
The DS100BR210 is an extremely low power, high performance repeater designed to support serial links with data rates up to 10.3 Gbps. The DS100BR210 pinout is configured as two unidirectional channels. The DS100BR210 inputs feature a powerful 4-stage continuous time linear equalizer (CTLE) to provide a boost of up to +36 dB at 5 GHz and open an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect mediums such as board traces or twin-axial copper cables. The transmitter features a programmable output de-emphasis driver with up to –12 dB and can drive output voltage levels from 700 mVp-p to 1300 mVp-p.
When configured as a 10G-KR repeater, the DS100BR210 allows the KR host and the end point to optimize the full link by adjusting transmit and receive equalizer coefficients using back-channel communication techniques specified by the 802.3ap Ethernet standard.
The programmable settings can be applied via pin control, SMBus protocol, or an external EEPROM. In the EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver. |
DS100BR41010.3-Gbps low power quad channel redriver with equalizer and de-emphasis driver | Evaluation Boards | 4 | Active | The DS100BR410 is an extremely low power, high performance quad-channel repeater for high-speed serial links with data rates up to 10.3125 Gbps. The device performs both receive equalization and transmit de-emphasis on each of its 4 channels to compensate for channel loss, allowing maximum flexibility of physical placement within a system.
The receiver's continuous time linear equalizer (CTLE) is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium such as backplane trace or cable. The transmitter features adjustable VOD(output amplitude voltage level) and de-emphasis driver to compensate for PCB trace lost.
With a low power consumption and control to turn-off unused channels, the DS100BR410 is part of TI's PowerWise family of energy efficient devices.
The programmable settings can be applied via pin mode or SMBus mode interface.
The DS100BR410 is an extremely low power, high performance quad-channel repeater for high-speed serial links with data rates up to 10.3125 Gbps. The device performs both receive equalization and transmit de-emphasis on each of its 4 channels to compensate for channel loss, allowing maximum flexibility of physical placement within a system.
The receiver's continuous time linear equalizer (CTLE) is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium such as backplane trace or cable. The transmitter features adjustable VOD(output amplitude voltage level) and de-emphasis driver to compensate for PCB trace lost.
With a low power consumption and control to turn-off unused channels, the DS100BR410 is part of TI's PowerWise family of energy efficient devices.
The programmable settings can be applied via pin mode or SMBus mode interface. |
DS100DF41010-Gbps quad channel retimer with adaptive EQ, CDR and DFE | Interface | 2 | Active | The DS100DF410 is four channel retimers with integrated signal conditioning. Each channel can independently lock to 10.3125 Gbps data rate to support 10GbE. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), Clock and Data Recovery (CDR) and transmit De-Emphasis (DE) driver. The DS100DF410 also includes a self calibrating 5-tap Decision Feedback Equalizer (DFE) to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15.
The programmable settings can be applied easily using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning. Flow-through pinout and single power supply make the DS100DF410 easy to use.
The DS100DF410 is four channel retimers with integrated signal conditioning. Each channel can independently lock to 10.3125 Gbps data rate to support 10GbE. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), Clock and Data Recovery (CDR) and transmit De-Emphasis (DE) driver. The DS100DF410 also includes a self calibrating 5-tap Decision Feedback Equalizer (DFE) to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15.
The programmable settings can be applied easily using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning. Flow-through pinout and single power supply make the DS100DF410 easy to use. |
DS100KR40110.3-Gbps quad lane (8 channel) redriver with EQ and DE | Interface | 2 | Active | The DS100KR401 is an extremely low power, high performance repeater designed to support 4 lane (bi-directional) 10G-KR and other high speed interface serial protocols up to 10.3 Gbps. The receiver's continuous time linear equalizer (CTLE) provides a boost of up to +36 dB at 5 GHz (10.3125 Gbps) in each of its eight channels and is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as long backplanes or cables, hence enabling host controllers to ensure an error free end-to-end link. The transmitter provides a de-emphasis boost of up to -12 dB and output voltage amplitude control from 700 mV to 1300 mV to allow maximum flexibility in the physical placement within the interconnect channel.
When operating in 10G-KR mode, the DS100KR401 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients as defined in the 802.3ap standard. This seamless management of the link training protocol ensures guaranteed system level interoperability with minimum latency.
With a low power consumption of 65 mW/channel (typ) and option to turn-off unused channels, the DS100KR401 enables energy efficient system design. A single supply of 3.3v or 2.5v is required to power the device.
The programmable settings can be applied via pin settings, SMBus (I2C) protocol or an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power up. This eliminates the need for an external microprocessor or software driver.
The DS100KR401 is an extremely low power, high performance repeater designed to support 4 lane (bi-directional) 10G-KR and other high speed interface serial protocols up to 10.3 Gbps. The receiver's continuous time linear equalizer (CTLE) provides a boost of up to +36 dB at 5 GHz (10.3125 Gbps) in each of its eight channels and is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as long backplanes or cables, hence enabling host controllers to ensure an error free end-to-end link. The transmitter provides a de-emphasis boost of up to -12 dB and output voltage amplitude control from 700 mV to 1300 mV to allow maximum flexibility in the physical placement within the interconnect channel.
When operating in 10G-KR mode, the DS100KR401 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients as defined in the 802.3ap standard. This seamless management of the link training protocol ensures guaranteed system level interoperability with minimum latency.
With a low power consumption of 65 mW/channel (typ) and option to turn-off unused channels, the DS100KR401 enables energy efficient system design. A single supply of 3.3v or 2.5v is required to power the device.
The programmable settings can be applied via pin settings, SMBus (I2C) protocol or an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power up. This eliminates the need for an external microprocessor or software driver. |
DS100KR80010.3-Gbps 8 channel (uni-directional) redriver with EQ and DE | Interface | 2 | Active | The DS100KR800 device is a high performance repeater designed to support 8-channel (unidirectional), 10G-KR, and other high-speed interface serial protocols up to 10.3 Gbps. The continuous time linear equalizer (CTLE) of the receiver provides a boost of up to 36 dB at 5 GHz (10.3125 Gbps) in each of its eight channels. This equalizer is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as long backplanes or cables. The transmitter provides a de-emphasis boost of up to –12 dB and output voltage amplitude control from 700 mV to 1300 mV.
When operating in 10G-KR mode, the DS100KR800 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients as defined in the 802.3ap standard. This seamless management of the link training protocol ensures system level interoperability with minimum latency.
The programmable settings can be applied through pin settings, SMBus (I2C) protocol or an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power-up. This eliminates the need for an external microprocessor or software driver.
The DS100KR800 device is a high performance repeater designed to support 8-channel (unidirectional), 10G-KR, and other high-speed interface serial protocols up to 10.3 Gbps. The continuous time linear equalizer (CTLE) of the receiver provides a boost of up to 36 dB at 5 GHz (10.3125 Gbps) in each of its eight channels. This equalizer is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as long backplanes or cables. The transmitter provides a de-emphasis boost of up to –12 dB and output voltage amplitude control from 700 mV to 1300 mV.
When operating in 10G-KR mode, the DS100KR800 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients as defined in the 802.3ap standard. This seamless management of the link training protocol ensures system level interoperability with minimum latency.
The programmable settings can be applied through pin settings, SMBus (I2C) protocol or an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power-up. This eliminates the need for an external microprocessor or software driver. |
