Texas Instruments

High Speed CMOS Logic 12-Stage Binary Counter

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits. This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state. The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits. This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state.

The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are high speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power con-sumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices. The outputs are transparent to the inputs when the latch enable (LE\) is high. When the latch enable (LE\) goes low the data is latched. The output enable (OE\) controls the three-state outputs. When the output enable (OE\) is high the outputs are in the high impedance state. The latch operation is independent of the state of the output enable. The ’HC533 and ’HCT533 are identical in function to the ’HC563 and CD74HCT563 but have different pinouts. The ’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373; the latter are non-inverting types. The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are high speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power con-sumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices. The outputs are transparent to the inputs when the latch enable (LE\) is high. When the latch enable (LE\) goes low the data is latched. The output enable (OE\) controls the three-state outputs. When the output enable (OE\) is high the outputs are in the high impedance state. The latch operation is independent of the state of the output enable. The ’HC533 and ’HCT533 are identical in function to the ’HC563 and CD74HCT563 but have different pinouts. The ’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373; the latter are non-inverting types.

High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs

High Speed CMOS Logic Octal Transparent Latch with 3-State Output

High Speed CMOS Logic Octal Inverting Bus Transceiver with 3-State Outputs

The CDx4HCT74-Q1 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each. The CDx4HCT74-Q1 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each.

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected. The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic. The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic.