Texas Instruments

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC. The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC. The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC. The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC. The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux®and TI-RTOS are available free of charge from TI. The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows: The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications. The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface The device supports high-level operating systems (OSs), such as: The following subsystems are part of the device: AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package. This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor. AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications. The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface The device supports high-level operating systems (OSs), such as: The following subsystems are part of the device: AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package. This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

The AM37x generation (AM3715/AM3703) of Sitara™ high-performance microprocessors is based on the enhanced Cortex™-A8 device architecture and is integrated on TI's advanced 45-nm process technology. This architecture is designed to provide best in class ARM and graphics performance while delivering low power consumption. The device can support numerous high-level operating systems and real-time operating system solutions including Linux, Android and Windows Embedded CE which are available free of charge directly from TI. Additionally, the device is fully backward compatible with previous Cortex-A8 Sitara microprocessors and OMAP™ processors. The AM3715/AM3703 microprocessor data manual presents the electrical and mechanical specifications for the AM3715/AM3703 microprocessor. The information contained in this data manual applies to both the commercial and extended temperature versions of the AM3715/03 Microprocessor unless otherwise indicated. It consists of the following sections: The AM37x generation (AM3715/AM3703) of Sitara™ high-performance microprocessors is based on the enhanced Cortex™-A8 device architecture and is integrated on TI's advanced 45-nm process technology. This architecture is designed to provide best in class ARM and graphics performance while delivering low power consumption. The device can support numerous high-level operating systems and real-time operating system solutions including Linux, Android and Windows Embedded CE which are available free of charge directly from TI. Additionally, the device is fully backward compatible with previous Cortex-A8 Sitara microprocessors and OMAP™ processors. The AM3715/AM3703 microprocessor data manual presents the electrical and mechanical specifications for the AM3715/AM3703 microprocessor. The information contained in this data manual applies to both the commercial and extended temperature versions of the AM3715/03 Microprocessor unless otherwise indicated. It consists of the following sections:

The AM37x generation (AM3715/AM3703) of Sitara™ high-performance microprocessors is based on the enhanced Cortex™-A8 device architecture and is integrated on TI's advanced 45-nm process technology. This architecture is designed to provide best in class ARM and graphics performance while delivering low power consumption. The device can support numerous high-level operating systems and real-time operating system solutions including Linux, Android and Windows Embedded CE which are available free of charge directly from TI. Additionally, the device is fully backward compatible with previous Cortex-A8 Sitara microprocessors and OMAP™ processors. The AM3715/AM3703 microprocessor data manual presents the electrical and mechanical specifications for the AM3715/AM3703 microprocessor. The information contained in this data manual applies to both the commercial and extended temperature versions of the AM3715/03 Microprocessor unless otherwise indicated. It consists of the following sections: The AM37x generation (AM3715/AM3703) of Sitara™ high-performance microprocessors is based on the enhanced Cortex™-A8 device architecture and is integrated on TI's advanced 45-nm process technology. This architecture is designed to provide best in class ARM and graphics performance while delivering low power consumption. The device can support numerous high-level operating systems and real-time operating system solutions including Linux, Android and Windows Embedded CE which are available free of charge directly from TI. Additionally, the device is fully backward compatible with previous Cortex-A8 Sitara microprocessors and OMAP™ processors. The AM3715/AM3703 microprocessor data manual presents the electrical and mechanical specifications for the AM3715/AM3703 microprocessor. The information contained in this data manual applies to both the commercial and extended temperature versions of the AM3715/03 Microprocessor unless otherwise indicated. It consists of the following sections: