TDA4VE-Q1Automotive system-on-a-chip for autoparking and driver assist with AI, vision pre-processing and GPU | Integrated Circuits (ICs) | 1 | Active | The TDA4VE TDA4AL TDA4VL processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at Smart Vision Camera applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the Vision processor market. The TDA4AL provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced vision camera applications. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview: The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating-point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated Vision hardware accelerators provide vision pre-processing with no impact on system performance.
General Compute Cores and Integration Overview: Separate dual core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to four Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A72 core’s unencumbered for applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D levels while the integrated security features protect data against modern day attacks. CSI2.0 ports enable multi sensor inputs. To further the integration, the TDA4VE TDA4AL TDA4VL family also includes an MCU island eliminating the need for an external system microcontroller.
The TDA4VE TDA4AL TDA4VL processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at Smart Vision Camera applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the Vision processor market. The TDA4AL provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced vision camera applications. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview: The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating-point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated Vision hardware accelerators provide vision pre-processing with no impact on system performance.
General Compute Cores and Integration Overview: Separate dual core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to four Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A72 core’s unencumbered for applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D levels while the integrated security features protect data against modern day attacks. CSI2.0 ports enable multi sensor inputs. To further the integration, the TDA4VE TDA4AL TDA4VL family also includes an MCU island eliminating the need for an external system microcontroller. |
TDA4VMDual Arm® Cortex®-A72 SoC and C7x DSP with deep-learning, vision and multimedia accelerators | System On Chip (SoC) | 1 | Active | The TDA4VM processor family targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in a functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview
The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.
General Compute Cores and Integration Overview
Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated "8XE GE8430" GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller.
The TDA4VM processor family targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in a functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview
The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.
General Compute Cores and Integration Overview
Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated "8XE GE8430" GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller. |
TDA4VM-Q1Automotive system-on-a-chip for L2, L3 and near-field analytic systems using deep learning | System On Chip (SoC) | 1 | Active | The TDA4VM processor family targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in a functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview
The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.
General Compute Cores and Integration Overview
Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated "8XE GE8430" GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller.
The TDA4VM processor family targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in a functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.
Key Performance Cores Overview
The "C7x" next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new "MMA" deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.
General Compute Cores and Integration Overview
Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated "8XE GE8430" GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller. |
TDC1000-Q1Automotive Ultrasonic Sensing Analog Front End for Level and Concentration Sensing | Integrated Circuits (ICs) | 3 | Active | The TDC1000-Q1 is a fully integrated analog front-end (AFE) for ultrasonic sensing measurements of level, fluid identification/concentration, and proximity/distance applications common in automotive, industrial, and consumer markets. When paired with an MSP430/C2000 MCU, power, wireless, and source code, TI provides the complete ultrasonic sensing solution.
TI’s Ultrasonic AFE offers programmability and flexibility to accommodate a wide-range of applications and end equipment. The TDC1000-Q1 can be configured for multiple transmit pulses and frequencies, gain, and signal thresholds for use with a wide-range of transducer frequencies (31.25 kHz to 4 MHz) and Q-factors. Similarly, the programmability of the receive path allows ultrasonic waves to be detected over a wider range of distances/tank sizes and through various mediums.
Selecting different modes of operation, the TDC1000-Q1 can be optimized for low power consumption for battery-powered flow meters, level instrumentation, and distance/proximity measurements. The low noise amplifiers and comparators provide extremely low jitter, enabling picosecond resolution and accuracy for zero and low flow measurements.
The TDC1000-Q1 is a fully integrated analog front-end (AFE) for ultrasonic sensing measurements of level, fluid identification/concentration, and proximity/distance applications common in automotive, industrial, and consumer markets. When paired with an MSP430/C2000 MCU, power, wireless, and source code, TI provides the complete ultrasonic sensing solution.
TI’s Ultrasonic AFE offers programmability and flexibility to accommodate a wide-range of applications and end equipment. The TDC1000-Q1 can be configured for multiple transmit pulses and frequencies, gain, and signal thresholds for use with a wide-range of transducer frequencies (31.25 kHz to 4 MHz) and Q-factors. Similarly, the programmability of the receive path allows ultrasonic waves to be detected over a wider range of distances/tank sizes and through various mediums.
Selecting different modes of operation, the TDC1000-Q1 can be optimized for low power consumption for battery-powered flow meters, level instrumentation, and distance/proximity measurements. The low noise amplifiers and comparators provide extremely low jitter, enabling picosecond resolution and accuracy for zero and low flow measurements. |
TDC1011-Q1Automotive Ultrasonic Sensing Analog Front End (AFE) for Level and ID Sensing | Sensor and Detector Interfaces | 3 | Active | The TDC1011 is a fully integrated analog front-end (AFE) for ultrasonic sensing measurements of liquid level, fluid identification/concentration, and proximity/ distance applications common in automotive, industrial, medical, and consumer markets. When paired with an MSP430/C2000 MCU, power, wireless, and source code, TI provides the complete ultrasonic sensing solution.
TI's Ultrasonic AFE offers programmability and flexibility to accommodate a wide-range of applications and end equipment. The TDC1011 can be configured for multiple transmit pulses and frequencies, gain, and signal thresholds for use with a wide-range of transducer frequencies (31.25kHz to 4MHz) and Q-factors. Similarly, the programmability of the receive path allows ultrasonic waves to be detected over a wider range of distances/tank sizes and through various mediums.
Selecting different modes of operation, the TDC1011 can be optimized for low power consumption, making it ideal for battery powered applications. The low noise amplifiers and comparators provide extremely low jitter, enabling picosecond resolution and accuracy.
The TDC1011 is a fully integrated analog front-end (AFE) for ultrasonic sensing measurements of liquid level, fluid identification/concentration, and proximity/ distance applications common in automotive, industrial, medical, and consumer markets. When paired with an MSP430/C2000 MCU, power, wireless, and source code, TI provides the complete ultrasonic sensing solution.
TI's Ultrasonic AFE offers programmability and flexibility to accommodate a wide-range of applications and end equipment. The TDC1011 can be configured for multiple transmit pulses and frequencies, gain, and signal thresholds for use with a wide-range of transducer frequencies (31.25kHz to 4MHz) and Q-factors. Similarly, the programmability of the receive path allows ultrasonic waves to be detected over a wider range of distances/tank sizes and through various mediums.
Selecting different modes of operation, the TDC1011 can be optimized for low power consumption, making it ideal for battery powered applications. The low noise amplifiers and comparators provide extremely low jitter, enabling picosecond resolution and accuracy. |
| Sensor and Detector Interfaces | 3 | Active | |
TDC7201TDC7201 Time-to-Digital Converter for Time-of-Flight Applications | Development Boards, Kits, Programmers | 2 | Active | The TDC7201 is designed for use with ultrasonic, laser and radar range finding equipment using time-of-flight technique. The TDC7201 has two built-in Time-to-Digital Converters (TDCs) that can be used to measure distance down to 4 cm and up to several kilometers using a simple architecture, which eliminates the need to use expensive FPGAs or processors.
Each TDC performs the function of a stopwatch and measures the elapsed time (time-of-flight or TOF) between a START pulse and up to five STOP pulses. The ability to measure simultaneously and individually on two pairs of START and STOP pins using two built-in TDCs offers high flexibility in time measurement design.
The device has an internal self-calibrated time base which compensates for drift over time and temperature. Self-calibration enables time-to-digital conversion accuracy in the order of picoseconds. This accuracy makes the TDC7201 ideal for range finder applications.
When placed in the Autonomous Multi-Cycle Averaging Mode, the TDC7201 device can be optimized for low system power consumption, which is ideal for battery-powered flow meters. In this mode, the host can go to sleep to save power and wake up when interrupted by the TDC upon completion of the measurement sequence.
The TDC7201 is designed for use with ultrasonic, laser and radar range finding equipment using time-of-flight technique. The TDC7201 has two built-in Time-to-Digital Converters (TDCs) that can be used to measure distance down to 4 cm and up to several kilometers using a simple architecture, which eliminates the need to use expensive FPGAs or processors.
Each TDC performs the function of a stopwatch and measures the elapsed time (time-of-flight or TOF) between a START pulse and up to five STOP pulses. The ability to measure simultaneously and individually on two pairs of START and STOP pins using two built-in TDCs offers high flexibility in time measurement design.
The device has an internal self-calibrated time base which compensates for drift over time and temperature. Self-calibration enables time-to-digital conversion accuracy in the order of picoseconds. This accuracy makes the TDC7201 ideal for range finder applications.
When placed in the Autonomous Multi-Cycle Averaging Mode, the TDC7201 device can be optimized for low system power consumption, which is ideal for battery-powered flow meters. In this mode, the host can go to sleep to save power and wake up when interrupted by the TDC upon completion of the measurement sequence. |
TDES49404K V³Link™ to DP/eDP deserializer for high-resolution panels | Serializers, Deserializers | 1 | Active | The TDES4940 is a V 3Link Enhanced Video to DisplayPort (DP) / Embedded DisplayPort (eDP) bridge device. In conjunction with a V 3Link Enhanced Video serializer, the chipset receives a high-speed serialized interface over low-cost 50 Ω coax or STP/STQ cables. The TDES4940 is a VESA DP v1.4a/eDP v1.4b compatible device that supports advanced features such as HBR3, and SuperFrame formats. The device supports video resolutions of 4K 30-bit color and higher. The V 3Link Enhanced Video supports video and audio data transmission and full duplex control, including I2C, and GPIO data over the same link. Consolidation of video data and control over V 3Link Enhanced Video lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In compatible V 3Link mode, the device supports up to 2K resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP capable serializer.
The TDES4940 is a V 3Link Enhanced Video to DisplayPort (DP) / Embedded DisplayPort (eDP) bridge device. In conjunction with a V 3Link Enhanced Video serializer, the chipset receives a high-speed serialized interface over low-cost 50 Ω coax or STP/STQ cables. The TDES4940 is a VESA DP v1.4a/eDP v1.4b compatible device that supports advanced features such as HBR3, and SuperFrame formats. The device supports video resolutions of 4K 30-bit color and higher. The V 3Link Enhanced Video supports video and audio data transmission and full duplex control, including I2C, and GPIO data over the same link. Consolidation of video data and control over V 3Link Enhanced Video lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In compatible V 3Link mode, the device supports up to 2K resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP capable serializer. |
TDES96407.55-Gbps MIPI® CSI-2 V³Link™ deserializer quad hub for high speed sensors | Integrated Circuits (ICs) | 1 | Active | The TDES9640 is a V 3Link Enhanced Vision deserializer that delivers robust ultra-high-speed 7.55 Gbps forward channel and 47.1875 Mbps bidirectional control channel for connecting up to 4 data sensors to the processing unit over a coaxial or STP cable. When paired with the TSER9615 or the TSER4905 serializers, the TDES9640 receives video data from image sensors or video sources supporting ultra-high resolutions or multiple sensors in various topologies.
Data is received and aggregated into two MIPI CSI-2 D-PHY or C-PHY outputs for interfacing with a downstream processor. An additional CSI port is used for port replication in D-PHY mode only. The flexible MIPI CSI-2 outputs support multiple virtual channels interleaving per port to differentiate multiple sensors, exposures, and data types. This functionality features video aggregation and replication modes and supports input-to-output port as well as virtual channel (VC-ID) remapping.
The TDES9640 supports advanced data protection and diagnostic features, as well as multiple levels of data integrity checking and protection in conjunction with programmable health status interrupt, which helps achieve robust sensor module and link operation in the end application.
The TDES9640 is a V 3Link Enhanced Vision deserializer that delivers robust ultra-high-speed 7.55 Gbps forward channel and 47.1875 Mbps bidirectional control channel for connecting up to 4 data sensors to the processing unit over a coaxial or STP cable. When paired with the TSER9615 or the TSER4905 serializers, the TDES9640 receives video data from image sensors or video sources supporting ultra-high resolutions or multiple sensors in various topologies.
Data is received and aggregated into two MIPI CSI-2 D-PHY or C-PHY outputs for interfacing with a downstream processor. An additional CSI port is used for port replication in D-PHY mode only. The flexible MIPI CSI-2 outputs support multiple virtual channels interleaving per port to differentiate multiple sensors, exposures, and data types. This functionality features video aggregation and replication modes and supports input-to-output port as well as virtual channel (VC-ID) remapping.
The TDES9640 supports advanced data protection and diagnostic features, as well as multiple levels of data integrity checking and protection in conjunction with programmable health status interrupt, which helps achieve robust sensor module and link operation in the end application. |
TDP0604DP++ 6-Gbps HDMI 2.0 redriver | Signal Buffers, Repeaters, Splitters | 3 | Active | The TDP0604 is a HDMI 2.0 redriver supporting data rates up to 6 Gbps. It is backwards compatible to HDMI 1.4b. The high-speed differential inputs and outputs can be either AC-coupled or DC-coupled which qualifies the TDP0604 to be used as a DP++ to HDMI level shifter or HDMI redriver.
The TDP0604 is a hybrid redriver supporting both source and sink applications. A hybrid redriver can operate either in a linear or limited redriver function. When configured as a limited redriver, the TDP0604 differential output voltage levels are independent of the graphics process unit (GPU) output levels ensuring HDMI compliant levels at the receptacle. The limited redriver mode is recommended for HDMI source applications. When configured as a linear redriver, the TDP0604 differential output levels are a linear function of the GPU output levels enabling TDP0604 to be transparent to link training and operate as a channel shortener. Linear redriver mode is recommended for HDMI sink applications.
The TDP0604 has an integrated HPD level shifter. The HPD level shifter will shift the 5-V HPD signal to either 1.8-V or 3.3-V. The level shifter output can also be configured for push, pull, or open-drain. Also integrated in the TDP0604 is a Digital Display Control (DDC) buffer. The DDC buffer offers capacitance isolation and level shifters 5-V DDC levels to as low as 1.2-V levels. The integration of the level shifter eliminates discrete solutions and thereby saves system cost.
The TDP0604 supports single power supply rails of 3.3-V on V CC and is offered in a commercial temperature ( TDP0604) and industrial temperature ( TDP0604I).
The TDP0604 is a HDMI 2.0 redriver supporting data rates up to 6 Gbps. It is backwards compatible to HDMI 1.4b. The high-speed differential inputs and outputs can be either AC-coupled or DC-coupled which qualifies the TDP0604 to be used as a DP++ to HDMI level shifter or HDMI redriver.
The TDP0604 is a hybrid redriver supporting both source and sink applications. A hybrid redriver can operate either in a linear or limited redriver function. When configured as a limited redriver, the TDP0604 differential output voltage levels are independent of the graphics process unit (GPU) output levels ensuring HDMI compliant levels at the receptacle. The limited redriver mode is recommended for HDMI source applications. When configured as a linear redriver, the TDP0604 differential output levels are a linear function of the GPU output levels enabling TDP0604 to be transparent to link training and operate as a channel shortener. Linear redriver mode is recommended for HDMI sink applications.
The TDP0604 has an integrated HPD level shifter. The HPD level shifter will shift the 5-V HPD signal to either 1.8-V or 3.3-V. The level shifter output can also be configured for push, pull, or open-drain. Also integrated in the TDP0604 is a Digital Display Control (DDC) buffer. The DDC buffer offers capacitance isolation and level shifters 5-V DDC levels to as low as 1.2-V levels. The integration of the level shifter eliminates discrete solutions and thereby saves system cost.
The TDP0604 supports single power supply rails of 3.3-V on V CC and is offered in a commercial temperature ( TDP0604) and industrial temperature ( TDP0604I). |
