TCAN4550-Q1Automotive system basis chip (SBC) with integrated CAN FD controller & transceiver | Power Management (PMIC) | 3 | Active | The TCAN4550-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification.
The TCAN4550-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion or CAN support with processors that do not support CAN FD. The TCAN4550-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake-up via local wake-up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake-Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe mode, internal dominant state timeout , wide bus operating range and a time-out watchdog as examples.
The TCAN4550-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification.
The TCAN4550-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion or CAN support with processors that do not support CAN FD. The TCAN4550-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake-up via local wake-up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake-Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe mode, internal dominant state timeout , wide bus operating range and a time-out watchdog as examples. |
TCAN4551-Q1Automotive control area network flexible data rate (CAN FD) controller with integrated transceiver | Integrated Circuits (ICs) | 1 | Active | The TCAN4551-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification. The TCAN4551-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion of CAN and CAN FD or CAN support with processors that do not support CAN FD. The TCAN4551-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake up via local wake up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe features, internal dominant state timeout and wide bus operating range as examples.
The TCAN4551-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification. The TCAN4551-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion of CAN and CAN FD or CAN support with processors that do not support CAN FD. The TCAN4551-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake up via local wake up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe features, internal dominant state timeout and wide bus operating range as examples. |
TDA2EG-17SoC processor w/ highly-featured graphics, video & vision acceleration for ADAS applications | Specialized ICs | 4 | Active | TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard. |
TDA3MDLow power SoC w/ full-featured processing for ADAS applications | System On Chip (SoC) | 1 | Active | TI’s TDA3x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA3x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power, smaller form factor and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA3x SoC enables sophisticated embedded vision technology in today’s automobile by enabling the industry’s broadest range of ADAS applications including front camera, rear camera, surround view, radar, and fusion on a single architecture.
The TDA3x SoC incorporates a heterogeneous, scalable architecture that includes a mix of Texas Instruments (TI)’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac (EVE), and dual-Cortex-M4 processors. The device allows low power profile in different package options (including Package-On-Package) to enable small form factor designs. TDA3x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.
The Vision AccelerationPac for this family of products includes embedded vision engine (EVE) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.
Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
The TDA3x ADAS processor is qualified according to AEC-Q100 standard.
TI’s TDA3x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA3x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power, smaller form factor and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA3x SoC enables sophisticated embedded vision technology in today’s automobile by enabling the industry’s broadest range of ADAS applications including front camera, rear camera, surround view, radar, and fusion on a single architecture.
The TDA3x SoC incorporates a heterogeneous, scalable architecture that includes a mix of Texas Instruments (TI)’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac (EVE), and dual-Cortex-M4 processors. The device allows low power profile in different package options (including Package-On-Package) to enable small form factor designs. TDA3x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.
The Vision AccelerationPac for this family of products includes embedded vision engine (EVE) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.
Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
The TDA3x ADAS processor is qualified according to AEC-Q100 standard. |
