| Integrated Circuits (ICs) | 16 | Active | These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 1.65V to 5.5V VCC operation.
The SNx4LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 1.65V to 5.5V VCC operation.
The SNx4LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. |
SN74LV4066A5V, 1:1 (SPST), 4-channel general-purpose analog switch | Analog Switches, Multiplexers, Demultiplexers | 9 | Active | This quadruple silicon-gate CMOS analog switch is designed for 1.65V to 5.5V VCC operation.
These switches are designed to handle both analog and digital signals. Each switch permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.
Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
This quadruple silicon-gate CMOS analog switch is designed for 1.65V to 5.5V VCC operation.
These switches are designed to handle both analog and digital signals. Each switch permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.
Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. |
| Interface | 1 | Obsolete | |
SN74LV4T001.8-V to 5.5-V single power supply quadruple NAND gates | Gates and Inverters | 1 | Active | The SN74LV4T00 contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T00 contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
SN74LV4T00-EPEnhanced-product four-channel two-input NAND gate with integrated level shifter | Logic | 2 | Active | The SN74LV4T00-EP contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T00-EP contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
SN74LV4T00-Q1Automotive 1.8-V to 5.5-V single power supply quadruple NAND gates | Gates and Inverters | 2 | Active | The SN74LV4T00-Q1 contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T00-Q1 contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
SN74LV4T02-EPEnhanced-product four-channel two-input NOR gate with integrated level shifter | Integrated Circuits (ICs) | 2 | Active | The SN74LV4T02-EP contains four independent 2-input NOR Gates with extended voltage operation to allow for level translation. Each gate performs the Boolean function Y = A + B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).
The SN74LV4T02-EP contains four independent 2-input NOR Gates with extended voltage operation to allow for level translation. Each gate performs the Boolean function Y = A + B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output). |
SN74LV4T081.8-V to 5.5-V single power supply quadruple AND gates | Gates and Inverters | 2 | Active | The SN74LV4T08 contains four independent 2-input AND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T08 contains four independent 2-input AND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
SN74LV4T08-EPEnhanced-product four-channel two-input AND gate with integrated level shifter | Logic | 1 | Active | The SN74LV4T08-EP contains four independent 2-input AND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T08-EP contains four independent 2-input AND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
SN74LV4T08-Q1Automotive single power supply quadruple AND gates with logic level shifter | Logic | 2 | Active | The SN74LV4T08-Q1 contains four independent 2-input AND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
The SN74LV4T08-Q1 contains four independent 2-input AND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). |
