| Integrated Circuits (ICs) | 1 | Active | The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. |
| Unclassified | 1 | Obsolete | |
SN74BCT125A4-ch, 4.5-V to 5.5-V buffers with 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 4 | Active | The ’BCT125A bus buffers feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The ’BCT125A bus buffers feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. |
SN74BCT22448-ch, 4.5-V to 5.5-V buffers with 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 4 | Active | The ’BCT2244 devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT2240 devices and SN74BCT2241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE)\ inputs, and complementary OE and OE\ inputs. These devices feature high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The outputs, which are designed to source or sink up to 12 mA, include 33-series resistors to reduce overshoot and undershoot.
The ’BCT2244 devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT2240 devices and SN74BCT2241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE)\ inputs, and complementary OE and OE\ inputs. These devices feature high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The outputs, which are designed to source or sink up to 12 mA, include 33-series resistors to reduce overshoot and undershoot. |
SN74BCT2245Octal Bus Transceivers With Series Damping Resistors | Integrated Circuits (ICs) | 4 | Active | The SN74BCT2245 octal transceiver and line/ MOS driver is designed for asynchronous communication between data buses.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can disable the devices so that both buses are effectively isolated.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The B-port outputs, which are designed to source or sink up to 12 mA, include 33-series resistors to reduce overshoot and undershoot.
The SN74BCT2245 octal transceiver and line/ MOS driver is designed for asynchronous communication between data buses.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can disable the devices so that both buses are effectively isolated.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The B-port outputs, which are designed to source or sink up to 12 mA, include 33-series resistors to reduce overshoot and undershoot. |
SN74BCT2408-ch, 4.5-V to 5.5-V inverters with 3-state outputs | Logic | 2 | Active | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT241 and ’BCT244 devices, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (OE)\ (active-low output-enable) inputs, and complementary OE and (OE)\ inputs. These devices feature high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT241 and ’BCT244 devices, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (OE)\ (active-low output-enable) inputs, and complementary OE and (OE)\ inputs. These devices feature high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. |
SN74BCT2414Dual 2-Line To 4-Line Memory Decoder With On-Chip Supply Voltage Monitor | Specialty Logic | 3 | Active | The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be externally cascaded to implement a 3-line to 8-line decoder.
The circuit has two supply voltage inputs: the voltage monitor (bandgap) is powered via the VCCterminal; the internal logic of the circuit is powered via the Vbatterminal. In case VCCdrops below 3.65 V (nominal), the voltage monitor forces the voltage-control (VS) and decoder outputs (Y) to the high level. VS may be used to disconnect the supply voltage of the memories (Vbat) from the system supply. This output is switched off when the on-chip supply voltage monitor detects a power failure.
The SN74BCT2414 is characterized for operation from 0°C to 70°C.
The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be externally cascaded to implement a 3-line to 8-line decoder.
The circuit has two supply voltage inputs: the voltage monitor (bandgap) is powered via the VCCterminal; the internal logic of the circuit is powered via the Vbatterminal. In case VCCdrops below 3.65 V (nominal), the voltage monitor forces the voltage-control (VS) and decoder outputs (Y) to the high level. VS may be used to disconnect the supply voltage of the memories (Vbat) from the system supply. This output is switched off when the on-chip supply voltage monitor detects a power failure.
The SN74BCT2414 is characterized for operation from 0°C to 70°C. |
SN74BCT2448-ch, 4.5-V to 5.5-V buffers with 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 5 | Active | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´BCT240 and ´BCT241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical(active-low output-enable) inputs, and complementary OE andinputs.
The ´BCT244 is organized as two 4-bit buffers/line drivers with separate output-enable () inputs. Whenis low, the device passes data from the A inputs to the Y outputs. Whenis high, the outputs are in the high-impedance state.
The SN54BCT244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT244 is characterized for operation from 0°C to 70°C.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´BCT240 and ´BCT241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical(active-low output-enable) inputs, and complementary OE andinputs.
The ´BCT244 is organized as two 4-bit buffers/line drivers with separate output-enable () inputs. Whenis low, the device passes data from the A inputs to the Y outputs. Whenis high, the outputs are in the high-impedance state.
The SN54BCT244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT244 is characterized for operation from 0°C to 70°C. |
| Buffers, Drivers, Receivers, Transceivers | 6 | Active | These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated. |
SN74BCT252448-ch, 4.5-V to 5.5-V buffers with 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 1 | Obsolete | These 25-octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
These buffers are capable of sinking 188-mA IOL, which facilitates switching 25-transmission lines on the incident wave. The distributed VCCand GND pins minimize switching noise for more reliable system operation.
When the output-enable (1and 2) inputs are low, the device transmits data from the A inputs to the Y outputs. When 1and 2are high, the outputs are in the high-impedance state.
The SN54BCT25244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT25244 is characterized for operation from 0°C to 70°C.
These 25-octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
These buffers are capable of sinking 188-mA IOL, which facilitates switching 25-transmission lines on the incident wave. The distributed VCCand GND pins minimize switching noise for more reliable system operation.
When the output-enable (1and 2) inputs are low, the device transmits data from the A inputs to the Y outputs. When 1and 2are high, the outputs are in the high-impedance state.
The SN54BCT25244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT25244 is characterized for operation from 0°C to 70°C. |
