Catalog
4-bit dual-supply bus transceiver
Key Features
• Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 VBus-hold on data inputs eliminates the need for external pullup or pulldown resistorsOperating temperature from –40°C to +125°CMultiple direction control pins to allow simultaneous up and down translationGlitch-free power supply sequencingUp to 380 Mbps support when translating from 1.8 V to 3.3 VVCCisolation featureIoffsupports partial-power-down mode operationCompatible with AVC family level shiftersLatch-up performance exceeds 100 mA per JESD 78, Class IIESD protection exceeds JESD 228000-V Human-body model1000-V Charged-device modelFully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 VBus-hold on data inputs eliminates the need for external pullup or pulldown resistorsOperating temperature from –40°C to +125°CMultiple direction control pins to allow simultaneous up and down translationGlitch-free power supply sequencingUp to 380 Mbps support when translating from 1.8 V to 3.3 VVCCisolation featureIoffsupports partial-power-down mode operationCompatible with AVC family level shiftersLatch-up performance exceeds 100 mA per JESD 78, Class IIESD protection exceeds JESD 228000-V Human-body model1000-V Charged-device model
Description
AI
The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
