SN74AUCH2448-ch, 0.8-V to 2.7-V high speed buffers with bus-hold and 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 1 | Active | This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCH244 is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCH244 is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
| Integrated Circuits (ICs) | 1 | Active | This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUCU046-ch, 0.8-V to 2.7-V high speed inverters | Gates and Inverters | 1 | Active | This hex inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCU04 contains six independent inverters with unbuffered outputs and performs the Boolean function Y = A\.
This hex inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUCU04 contains six independent inverters with unbuffered outputs and performs the Boolean function Y = A\. |
SN74AUP1G00Single 1-input, 0.8-V to 3.6-V low power NAND gate | Logic | 10 | Active | This single 2-input positive-NAND gate performs the Boolean function Y =A × Bor Y =A+Bin positive logic.
This single 2-input positive-NAND gate performs the Boolean function Y =A × Bor Y =A+Bin positive logic. |
SN74AUP1G02Single 2-input, 0.8-V to 3.6-V low power NOR gate | Integrated Circuits (ICs) | 10 | Active | This single 2-input positive-NOR gate performs the Boolean function Y =A + Bor Y =A×Bin positive logic.
This single 2-input positive-NOR gate performs the Boolean function Y =A + Bor Y =A×Bin positive logic. |
| Logic | 12 | Active | The SN74AUP1G04 device is a single inverter gate performs the Boolean function Y =A.
The SN74AUP1G04 device is a single inverter gate performs the Boolean function Y =A. |
SN74AUP1G06Single 0.8-V to 3.6-V low power inverter with open-drain outputs | Integrated Circuits (ICs) | 8 | Active | The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
AUP – The Lowest-Power FamilyandExcellent Signal Integrity).
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
AUP – The Lowest-Power FamilyandExcellent Signal Integrity). |
SN74AUP1G07Single 0.8-V to 3.6-V low power buffer with open-drain outputs | Logic | 11 | Active | The SN74AUP1G07 device is a single buffer gate with open drain output that operates from 0.8 V to 3.6 V.
The SN74AUP1G07 device is a single buffer gate with open drain output that operates from 0.8 V to 3.6 V. |
SN74AUP1G08-Q1Automotive, 1-ch, 2-input 0.8-V to 3.6-V low-power (< 1uA) AND gate | Logic | 15 | Active | The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y =A\ + B\in positive logic.
NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y =A\ + B\in positive logic.
NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUP1G125Single 0.8-V to 3.6-V low power buffer with 3-state outputs | Integrated Circuits (ICs) | 10 | Active | The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down,OEmust be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down,OEmust be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. |
