
Catalog
Single 2-input, 0.8-V to 3.6-V low power NOR gate
Key Features
• Available in the Ultra Small 0.64 mm2Package (DPW) with 0.5-mm PitchLow Static-Power Consumption(ICC= 0.9 µA Max)Low Dynamic-Power Consumption(Cpd= 4.3 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typ)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionInput Hysteresis Allows Slow Input Transition and Better Switching-Noise Immunity at the Input(Vhys= 250 mV Typ at 3.3 V)Wide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.6 ns Max at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Available in the Ultra Small 0.64 mm2Package (DPW) with 0.5-mm PitchLow Static-Power Consumption(ICC= 0.9 µA Max)Low Dynamic-Power Consumption(Cpd= 4.3 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typ)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionInput Hysteresis Allows Slow Input Transition and Better Switching-Noise Immunity at the Input(Vhys= 250 mV Typ at 3.3 V)Wide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.6 ns Max at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)
Description
AI
This single 2-input positive-NOR gate performs the Boolean function Y =A + Bor Y =A×Bin positive logic.
This single 2-input positive-NOR gate performs the Boolean function Y =A + Bor Y =A×Bin positive logic.