SN74AUC245Octal Bus Transceiver with 3-State Outputs | Buffers, Drivers, Receivers, Transceivers | 1 | Active | This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUC2G002-ch, 2-input, 0.8-V to 2.7-V high speed NAND gates | Logic | 6 | Active | This dual 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This dual 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUC2G022-ch, 2-input, 0.8-V to 2.7-V high speed NOR gates | Logic | 5 | Active | This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G02 performs the Boolean function Y =A + Bor Y =A•Bin positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G02 performs the Boolean function Y =A + Bor Y =A•Bin positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
| Gates and Inverters | 3 | Active | This dual inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G04 performs the Boolean function Y = A\.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This dual inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G04 performs the Boolean function Y = A\.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUC2G062-ch, 0.8-V to 2.7-V high speed inverters with open-drain outputs | Integrated Circuits (ICs) | 3 | Active | This dual inverter buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The output of the SN74AUC2G06 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This dual inverter buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The output of the SN74AUC2G06 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUC2G072-ch, 0.8-V to 2.7-V high speed buffers with open-drain outputs | Buffers, Drivers, Receivers, Transceivers | 4 | Active | This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The output of the SN74AUC2G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The output of the SN74AUC2G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUC2G082-ch, 2-input 0.8-V to 2.7-V ultra-high-speed (2.4 ns) AND gate | Gates and Inverters | 6 | Active | This dual 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G08 performs the Boolean function A • B or Y =A\ + B\in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
This dual 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G08 performs the Boolean function A • B or Y =A\ + B\in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027. |
SN74AUC2G1252-ch, 0.8-V to 2.7-V high speed buffers with 3-state outputs | Integrated Circuits (ICs) | 4 | Active | This dual bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G125 features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027.
This dual bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G125 features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027. |
SN74AUC2G2402-ch, 0.8-V to 2.7-V high speed inverters with 3-state outputs | Logic | 2 | Active | This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. WhenOEis low, the device passes data from the A input to the Y output. WhenOEis high, the outputs are in the high-impedance state.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027.
This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. WhenOEis low, the device passes data from the A input to the Y output. WhenOEis high, the outputs are in the high-impedance state.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027. |
SN74AUC2G2412-ch, 0.8-V to 2.7-V high speed buffers with 3-state outputs | Buffers, Drivers, Receivers, Transceivers | 4 | Active | This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OEis low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OEis high or 2OE is low, the outputs are in the high-impedance state.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027.
This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OEis low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OEis high or 2OE is low, the outputs are in the high-impedance state.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report,Applications of Texas Instruments AUC Sub-1-V Little Logic Devices,literature number SCEA027. |
