| RF FETs, MOSFETs | 2 | Active | The SD57045-01 is a common source N-Channel enhancement-mode lateral Field-Effect RF power transistor designed for broadband commercial and industrial applications at frequencies up to 1.0 GHz. The SD57045-01 is designed for high gain and broadband performance operating in common source mode at 28 V. It is ideal for base station applications requiring high linearity. |
| RF FETs, MOSFETs | 2 | Obsolete | |
| Discrete Semiconductor Products | 1 | Obsolete | |
| RF and Wireless | 1 | Active | |
| RF and Wireless | 1 | Active | |
| Integrated Circuits (ICs) | 2 | Obsolete | |
| Battery Chargers | 1 | Obsolete | |
SEA05LAdvanced constant voltage and constant current controller with very efficient LED pilot-lamp driver | PMIC | 2 | Active | The device is a highly integrated solution for SMPS applications, with an LED pilot-lamp requiring a dual control loop to perform CV (constant voltage) and CC (constant current) regulation.
The IC allows very efficient LED pilot-lamp driving which helps to reduce the standby consumption of the SMPS. It integrates a voltage reference, two op-amps (with OR-ed open-drain outputs), a low-side current sensing circuit and an LED pilot-lamp driver pin implemented with an open-drain mosfet driven by square waveform with 12.5% duty cycle at 1 kHz that allows reducing LED consumption.
The voltage reference, along with one op-amp, is the core of the voltage control loop. The current sensing circuit and the other op-amp make up the current control loop.
The external components needed to complete the two control loops are:
- a resistor divider that senses the output of the power supply and fixes the voltage regulation setpoint at the specified value
- a sense resistor that feeds the current sensing circuit with a voltage proportional to the DC output current; this resistor determines the current regulation setpoint and must be adequately rated in terms of power dissipation
- the frequency compensation components (R-C networks) for both loops.
The device is ideal for space-critical applications. |
| Interface | 1 | Active | The SERCOS interface controller SERCON816 is an integrated circuit for SERCOS interface communication systems. The SERCOS interface is a digital interface for communication between systems which have to exchange information cyclically at short, fixed intervals (62,5 s to 65 ms). It is appropriate for the synchronous operation of distributed control or test equipment (e.g. connection between drives and numeric control).
A SERCOS interface communication system consists of one master and several slaves. These units are connected by a fiber optical ring. This ring starts and ends at the master. The slaves regenerate and repeat their received data or send their own telegrams. By this method the telegrams sent by the master are received by all slaves while the master receives data telegrams from the slaves. The optical fiber assures a reliable high-speed data transmission with excellent noise immunity.
The SERCOS interface controller contains all the hardware-related functions of the SERCOS interface and considerably reduces the hardware costs and the computing time requirements of the microprocessor. It is the direct link between the electro-optical receiver and transmitter and the microprocessor that executes the control algorithms. The SERCON816 can be used both for SERCOS interface masters and slaves.
The circuit contains the following functions (Fig. 1):A serial interface for making a direct connection with the optical receiver and transmitter of the fiber optic ring or with drivers to an electric ring or bus. Data and clock regeneration, the repeater for ring topologies and the serial transmitter and receiver are integrated. The signals are monitored and test signals generated. The serial interface operates up to 16 Mbaud without external circuitry.A dual port RAM (2048 * 16 bit) for control and communication data. The organization of the memory is flexible.Telegram processing for automatic transmission and monitoring of synchronous and data telegrams. Only transmission data which is intended for the particular interface user is processed. The transmitted data is either stored in the internal RAM (single or double buffer) or transferred via direct memory access (DMA). The transmission of service channel information over several communication cycles is executed automatically.
In addition to the SERCOS interface the SERCON816 can also be used for other real-time communications tasks. As an alternative to the fiber optical ring also bus topologies with RS-485 signals are supported (Fig. 4). The SERCON816 is therefore suitable for a wide range of applications.
Remark: The SERCON816 is based on the former SERCON410B SERCOS interface controller. |
| Integrated Circuits (ICs) | 1 | Active | The SG3525A series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip + 5.1 V reference is trimmed to ±1 % and the input common-mode range of the error amplifier includes the reference voltage eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the CTand the discharge terminals provide a wide range of dead time ad- justment.These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuity and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown,as well as soft-start recycle with longer shutdown commands. These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor discharged for sub-normal input voltages. This lockout circuitry includes approximately 500 mV of hysteresis for jitter-free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulses has been terminated for any reason,the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200 mA. The SG3525A output stage features NOR logic, giving a LOW output for an OFF state. |
