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CD4521B

CD4521B Series

CMOS 24-Stage Frequency Divider

Manufacturer: Texas Instruments

Catalog

CMOS 24-Stage Frequency Divider

Key Features

Reset disables the RC oscillator for low-power standby conditionVDD’ and VSS’ pins are brought out from the crystal oscillator to allow use of external resistors for low-power operationMaximum input current of 1 µA at 18 V over full package-temperature range:100 nA at 18 V and 25°CCommon reset100% tested for 20-V quiescent current5, 10 and 15 V parametric ratingsStandardized symmetrical output characteristicsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Data sheet acquired from Harris SemiconductorReset disables the RC oscillator for low-power standby conditionVDD’ and VSS’ pins are brought out from the crystal oscillator to allow use of external resistors for low-power operationMaximum input current of 1 µA at 18 V over full package-temperature range:100 nA at 18 V and 25°CCommon reset100% tested for 20-V quiescent current5, 10 and 15 V parametric ratingsStandardized symmetrical output characteristicsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Data sheet acquired from Harris Semiconductor

Description

AI
CD4521B consists of an oscillator section and 24 ripple-carry binary counter stages. The oscillator configuration (using IN1) allows design of either RC or crystal oscillator circuits. IN1 should be tied either HIGH or LOW when not in use. A HIGH on the RESET causes the counter to go to the all-0’s state and disables the oscillator. The count is advanced on the negative transition of IN1 (and IN2). A time-saving test mode is described in the Functional Test Sequence Table and in Fig. 6. The CD4521B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). CD4521B consists of an oscillator section and 24 ripple-carry binary counter stages. The oscillator configuration (using IN1) allows design of either RC or crystal oscillator circuits. IN1 should be tied either HIGH or LOW when not in use. A HIGH on the RESET causes the counter to go to the all-0’s state and disables the oscillator. The count is advanced on the negative transition of IN1 (and IN2). A time-saving test mode is described in the Functional Test Sequence Table and in Fig. 6. The CD4521B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).