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8-LSSOP
Integrated Circuits (ICs)

74LVC2G132DCTRG4

Unknown
Texas Instruments

2-CH, 2-INPUT, 1.65-V TO 5.5-V NAND GATES WITH SCHMITT-TRIGGER INPUTS

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8-LSSOP
Integrated Circuits (ICs)

74LVC2G132DCTRG4

Unknown
Texas Instruments

2-CH, 2-INPUT, 1.65-V TO 5.5-V NAND GATES WITH SCHMITT-TRIGGER INPUTS

Technical Specifications

Parameters and characteristics for this part

Specification74LVC2G132DCTRG4
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Current - Quiescent (Max) [Max]10 µA
FeaturesSchmitt Trigger
Input Logic Level - High [Max]3.33 V
Input Logic Level - High [Min]1.16 V
Input Logic Level - Low [Max]1.87 V
Input Logic Level - Low [Min]0.39 V
Logic TypeNAND Gate
Max Propagation Delay @ V, Max CL6 ns
Mounting TypeSurface Mount
Number of Circuits2
Number of Inputs2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Supplier Device PackageSM8
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 3000$ 0.25
6000$ 0.23
15000$ 0.23
30000$ 0.22
Texas InstrumentsLARGE T&R 1$ 0.76
100$ 0.52
250$ 0.40
1000$ 0.27

Description

General part information

SN74LVC2G132 Series

This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC2G132 contains two inverters and performs the Boolean function Y =A ⋅ Bor Y =A+Bin positive logic. The device functions as two independent inverters, but because of Schmitt action, it has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

Understanding Advanced Bus-Interface Products Design Guide

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Texas Instruments Little Logic Application Report

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

LVC Characterization Information

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Dual 2-Input NAND Gate With Schmitt-Trigger Inputs datasheet (Rev. D)

Data sheet

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Live Insertion

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Logic Guide (Rev. AB)

Selection guide

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Input and Output Characteristics of Digital Integrated Circuits

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

How to Select Little Logic (Rev. A)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Signal Switch Data Book (Rev. A)

User guide

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide