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SN74AHC157QWBQBRQ1
Integrated Circuits (ICs)

SN74LV595AQWBQBRQ1

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Texas Instruments

AUTOMOTIVE 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

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SN74AHC157QWBQBRQ1
Integrated Circuits (ICs)

SN74LV595AQWBQBRQ1

Active
Texas Instruments

AUTOMOTIVE 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LV595AQWBQBRQ1
FunctionSerial to Parallel, Serial
GradeAutomotive
Logic TypeShift Register
Mounting TypeWettable Flank, Surface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case16-WFQFN Exposed Pad
QualificationAEC-Q100
Supplier Device Package16-WQFN (2.5x3.5)
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.92
10$ 0.81
25$ 0.76
100$ 0.62
250$ 0.58
500$ 0.49
1000$ 0.39
Digi-Reel® 1$ 0.92
10$ 0.81
25$ 0.76
100$ 0.62
250$ 0.58
500$ 0.49
1000$ 0.39
Tape & Reel (TR) 3000$ 0.36
6000$ 0.33
15000$ 0.32
30000$ 0.31
Texas InstrumentsLARGE T&R 1$ 0.58
100$ 0.39
250$ 0.30
1000$ 0.20

Description

General part information

SN74LV595A-Q1 Series

The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state.

The device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state.