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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV595ADBRE4 |
|---|---|
| Function | Serial to Parallel, Serial |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 16-SSOP |
| Package / Case [custom] | 0.209 in |
| Package / Case [custom] | 5.3 mm |
| Supplier Device Package | 16-SSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2000 | $ 0.35 | |
| 6000 | $ 0.33 | |||
| 10000 | $ 0.32 | |||
Description
General part information
SN74LV595A-Q1 Series
The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state.
The device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state.
Documents
Technical documentation and resources
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