SN74LV595A-Q1 Series

Automotive 8-bit shift registers with 3-state output registers

Catalog

Automotive 8-bit shift registers with 3-state output registers

Part	Supplier Device Package	Output Type	Function	Mounting Type	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case	Package / Case [y]	Number of Elements	Logic Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case [custom]	Package / Case [custom]	Grade	Qualification
Texas Instruments SN74LV595APWRG4	16-TSSOP	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C	0.173 in	16-TSSOP	4.4 mm	1	Shift Register	5.5 V	2 V
Texas Instruments SN74LV595ARGYRG4	16-VQFN (4x3.5)	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C		16-VFQFN Exposed Pad		1	Shift Register	5.5 V	2 V
Texas Instruments SN74LV595ADBR	16-SSOP	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C		16-SSOP		1	Shift Register	5.5 V	2 V	0.209 in	5.3 mm
Texas Instruments SN74LV595AQWBQBRQ1	16-WQFN (2.5x3.5)	Non-Inverted Tri-State	Serial to Parallel Serial	Surface Mount Wettable Flank	8	125 °C	-40 °C		16-WFQFN Exposed Pad		1	Shift Register	5.5 V	2 V			Automotive	AEC-Q100
Texas Instruments SN74LV595ADRG4	16-SOIC	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C	0.154 in	16-SOIC	3.9 mm	1	Shift Register	5.5 V	2 V
Texas Instruments SN74LV595AD	16-SOIC	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C	0.154 in	16-SOIC	3.9 mm	1	Shift Register	5.5 V	2 V
Texas Instruments SN74LV595AQPWRQ1	16-TSSOP	Tri-State	Serial to Parallel Serial	Surface Mount	8	125 °C	-40 °C	0.173 in	16-TSSOP	4.4 mm	1	Shift Register	5.5 V	2 V			Automotive	AEC-Q100
Texas Instruments SN74LV595ADBRE4	16-SSOP	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C		16-SSOP		1	Shift Register	5.5 V	2 V	0.209 in	5.3 mm
Texas Instruments SN74LV595APWRG3	16-TSSOP	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C	0.173 in	16-TSSOP	4.4 mm	1	Shift Register	5.5 V	2 V
Texas Instruments SN74LV595ADR	16-SOIC	Tri-State	Serial to Parallel Serial	Surface Mount	8	85 °C	-40 °C	0.154 in	16-SOIC	3.9 mm	1	Shift Register	5.5 V	2 V

Catalog

Automotive 8-bit shift registers with 3-state output registers

Key Features

• Qualified for automotive applicationsAvailable in wettable flank QFN (WBQB) packageCustomer-specific configuration control can be supported along with major-change approval2-V to 5.5-V V CC operationTypical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°CTypical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°CSupports mixed-mode voltage operation on all ports8-bit serial-in, parallel-out shiftI off supports partial-power-down mode operationShift register has direct clearQualified for automotive applicationsAvailable in wettable flank QFN (WBQB) packageCustomer-specific configuration control can be supported along with major-change approval2-V to 5.5-V V CC operationTypical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°CTypical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°CSupports mixed-mode voltage operation on all ports8-bit serial-in, parallel-out shiftI off supports partial-power-down mode operationShift register has direct clear

Description

The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state. The device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state. The device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.