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16 SOIC
Integrated Circuits (ICs)

SN74LVC138AQDREP

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Texas Instruments

ENHANCED PRODUCT 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER

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16 SOIC
Integrated Circuits (ICs)

SN74LVC138AQDREP

Active
Texas Instruments

ENHANCED PRODUCT 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC138AQDREP
Circuit1 x 3:8
Current - Output High, Low24 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
TypeDecoder/Demultiplexer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 2500$ 0.95
5000$ 0.92
Texas InstrumentsLARGE T&R 1$ 1.57
100$ 1.29
250$ 0.93
1000$ 0.70

Description

General part information

SN74LVC138A-Q1 Series

The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V VCC operation.

The device is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder minimizes the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

Documents

Technical documentation and resources

Signal Switch Data Book (Rev. A)

User guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

How to Select Little Logic (Rev. A)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Live Insertion

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Logic Guide (Rev. AB)

Selection guide

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Input and Output Characteristics of Digital Integrated Circuits

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

3-Line to 8-Line Decoder/Demultiplexer datasheet (Rev. D)

Data sheet

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Texas Instruments Little Logic Application Report

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Low-Voltage Logic (LVC) Designer's Guide

Design guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

LVC Characterization Information

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note