Integrated Circuits (ICs)

SN74LV573ATNS

Obsolete

Texas Instruments

IC D-TYPE TRANSP SGL 8:8 20SO

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Integrated Circuits (ICs)

SN74LV573ATNS

Obsolete

Texas Instruments

IC D-TYPE TRANSP SGL 8:8 20SO

Deep-Dive with AI

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LV573ATNS

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	16 mA
Current - Output High, Low [custom]	16 mA
Delay Time - Propagation	1 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-SOIC
Package / Case	0.209 "
Package / Case	5.3 mm
Supplier Device Package	20-SO
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	2 V

SN74LV573AT Series

Octal Transparent D-Type Latches With 3-State Outputs

Part	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Max]	Voltage - Supply [Min]	Independent Circuits	Logic Type	Package / Case	Package / Case [y]	Package / Case [y]	Supplier Device Package	Output Type	Mounting Type	Delay Time - Propagation	Operating Temperature [Max]	Operating Temperature [Min]	Circuit [custom]	Circuit [custom]	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74LV573ATDW	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SOIC	0.295 in	7.5 mm	20-SOIC	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8
Texas Instruments SN74LV573ADW	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SOIC	0.295 in	7.5 mm	20-SOIC	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8
Texas Instruments SN74LV573ARGYRG4	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-VFQFN Exposed Pad			20-VQFN (3.5x4.5)	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8
Texas Instruments SN74LV573APW	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-TSSOP	4.4 mm		20-TSSOP	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8	0.173 in
Texas Instruments SN74LV573ATNS	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SOIC			20-SO	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8		0.209 "	5.3 mm
Texas Instruments SN74LV573ADBRG4	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SSOP			20-SSOP	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8
Texas Instruments SN74LV573APWR	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-TSSOP	4.4 mm		20-TSSOP	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8	0.173 in
Texas Instruments SN74LV573ATNSRE4	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SOIC			20-SO	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8		0.209 "	5.3 mm
Texas Instruments SN74LV573ATDBRE4	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SSOP			20-SSOP	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8
Texas Instruments SN74LV573ADBR	16 mA	16 mA	5.5 V	2 V	1	D-Type Transparent Latch	20-SSOP			20-SSOP	Tri-State	Surface Mount	1 ns	85 °C	-40 °C	8	8

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1158	$ 0.26

Description

General part information

SN74LV573AT Series

The SN74LV573AT is an octal transparent D-type latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down,OEshall be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

No documents available