SA5532ADual, 30-V, 10-MHz, low noise (6-nV/√Hz max) audio op amp with -40°C to 85°C operation | Integrated Circuits (ICs) | 8 | Active | The NE5532, NE5532A, SA5532, and SA5532A devices are high-performance operational amplifiers combining excellent DC and AC characteristics. They feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short-circuit protection. These operational amplifiers are compensated internally for unity-gain operation. These devices have specified maximum limits for equivalent input noise voltage.
The NE5532, NE5532A, SA5532, and SA5532A devices are high-performance operational amplifiers combining excellent DC and AC characteristics. They feature very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, high slew rate, input-protection diodes, and output short-circuit protection. These operational amplifiers are compensated internally for unity-gain operation. These devices have specified maximum limits for equivalent input noise voltage. |
SA5534AQuad, 30-V, 10-MHz, low noise (6-nV/√Hz max) audio op amp with -40°C to 85°C operation | Integrated Circuits (ICs) | 4 | Active | The NE5534, NE5534A, SA5534, and SA5534A devices are high-performance operational amplifiers combining excellent dc and ac characteristics. Some of the features include very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, and high slew rate.
These operational amplifiers are compensated internally for a gain equal to or greater than three. Optimization of the frequency response for various applications can be obtained by use of an external compensation capacitor between COMP and COMP/BAL. The devices feature input-protection diodes, output short-circuit protection, and offset-voltage nulling capability with use of the BALANCE and COMP/BAL pins.
For the NE5534A and SA5534A devices, a maximum limit is specified for the equivalent input noise voltage.
The NE5534, NE5534A, SA5534, and SA5534A devices are high-performance operational amplifiers combining excellent dc and ac characteristics. Some of the features include very low noise, high output-drive capability, high unity-gain and maximum-output-swing bandwidths, low distortion, and high slew rate.
These operational amplifiers are compensated internally for a gain equal to or greater than three. Optimization of the frequency response for various applications can be obtained by use of an external compensation capacitor between COMP and COMP/BAL. The devices feature input-protection diodes, output short-circuit protection, and offset-voltage nulling capability with use of the BALANCE and COMP/BAL pins.
For the NE5534A and SA5534A devices, a maximum limit is specified for the equivalent input noise voltage. |
| Programmable Timers and Oscillators | 7 | Active | |
SA556Dual precision timer w/ Extended Temperature Range | Programmable Timers and Oscillators | 2 | Active | The Nx556 and Sx556 devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each package. These circuits operate in an astable or monostable mode with external resistor-capacitor (RC) timing control. The basic timing provided by the RC time constant is controlled actively by modulating the bias of the control-voltage input.
Each timer has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering.
The Nx556 and Sx556 devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each package. These circuits operate in an astable or monostable mode with external resistor-capacitor (RC) timing control. The basic timing provided by the RC time constant is controlled actively by modulating the bias of the control-voltage input.
Each timer has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering. |
| Development Boards, Kits, Programmers | 2 | Obsolete | |
| Interface | 1 | Obsolete | |
| Integrated Circuits (ICs) | 2 | Obsolete | |
SCAN15MB200Dual 1.5-Gbps 2:1/1:2 LVDS mux/buffer with pre-emphasis and IEEE 1149.6 | Signal Buffers, Repeaters, Splitters | 2 | Active | The SCAN15MB200 is a dual-port 2 to 1 multiplexer and 1 to 2 repeater/buffer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.
Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and high-speed differential PCB interconnects. The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial -40 to +85°C temperature range.
The SCAN15MB200 is a dual-port 2 to 1 multiplexer and 1 to 2 repeater/buffer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.
Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and high-speed differential PCB interconnects. The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial -40 to +85°C temperature range. |
| Serializers, Deserializers | 2 | Obsolete | |
| Evaluation Boards | 2 | Obsolete | |
