| Buffers, Drivers, Receivers, Transceivers | 4 | Active | |
| Integrated Circuits (ICs) | 1 | Active | |
74ACT1662316-Bit Bus Transceivers With 3-State Outputs | Integrated Circuits (ICs) | 2 | Obsolete | The 'ACT16623 are 16-bit transceivers designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneously enablingand OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain at their last states.
The 74ACT16623 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16623 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16623 is characterized for operation from -40°C to 85°C.
The 'ACT16623 are 16-bit transceivers designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneously enablingand OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain at their last states.
The 74ACT16623 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16623 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16623 is characterized for operation from -40°C to 85°C. |
74ACT1664616-Bit Bus Transceivers And Registers With 3-State Outputs | Buffers, Drivers, Receivers, Transceivers | 3 | Active | The 'ACT16646 are 16-bit bus transceivers consisting of D-type flip-flops and control circuitry with 3-state outputs arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the bus transceivers and registers.
Output-enableand direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select controls (SAB and SBA) can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data whenis low. In the isolation mode (high), A data may be stored in one register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time.
The 74ACT16646 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16646 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16646 is characterized for operation from -40°C to 85°C.
The 'ACT16646 are 16-bit bus transceivers consisting of D-type flip-flops and control circuitry with 3-state outputs arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the bus transceivers and registers.
Output-enableand direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select controls (SAB and SBA) can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data whenis low. In the isolation mode (high), A data may be stored in one register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time.
The 74ACT16646 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16646 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16646 is characterized for operation from -40°C to 85°C. |
| Logic | 1 | Active | |
74ACT1665116-Bit Transceivers And Registers With 3-State Outputs | Integrated Circuits (ICs) | 2 | Active | The SN54ACT16651 and 74ACT16651 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. These devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN54ACT16651 and 74ACT16651.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT16651 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16651 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16651 is characterized for operation from -40°C to 85°C.
The SN54ACT16651 and 74ACT16651 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. These devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN54ACT16651 and 74ACT16651.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT16651 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16651 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16651 is characterized for operation from -40°C to 85°C. |
74ACT1665216-Bit Transceivers And Registers With 3-State Outputs | Buffers, Drivers, Receivers, Transceivers | 3 | Active | The 'ACT16652 are 16-bit bus transceivers consisting of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'ACT16652.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT16652 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16652 is characterized for operation from -40°C to 85°C.
The 'ACT16652 are 16-bit bus transceivers consisting of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'ACT16652.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT16652 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16652 is characterized for operation from -40°C to 85°C. |
74ACT1665716-Bit Transceivers With Parity Generators/Checkers and 3-State Outputs | Logic | 2 | Active | The 'ACT16657 contain two noninverting octal transceiver sections with separate parity generator/checker circuits and control signals. For either section, the transmit/receive (1T/R\ or 2T/R\) input determines the direction of data flow. When 1T/R\ (or 2T/R\) is high, data flows from the 1A (or 2A) port to the 1B (or 2B) port (transmit mode); when 1T/R\ (or 2T/R\) is low, data flows from the 1B (or 2B) port to the 1A (or 2A) port (receive mode). When the output-enable (1or 2) input is high, both the 1A (or 2A) and 1B (or 2B) ports are in the high-impedance state.
Odd or even parity is selected by a logic high or low level, respectively, on the 1ODD/(or 2ODD/) input. 1PARITY (or 2PARITY) carries the parity bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode.
In the transmit mode, after the 1A (or 2A) bus is polled to determine the number of high bits, 1PARITY (or 2PARITY) is set to the logic level that maintains the parity sense selected by the level at the 1ODD/(or 2ODD/) input. For example, if 1ODD/is low (even parity selected) and there are five high bits on the 1A bus, then 1PARITY is set to the logic high level so that an even number of the nine total bits (eight 1A-bus bits plus parity bit) are high.
In the receive mode, after the 1B (or 2B) bus is polled to determine the number of high bits, the 1(or 2) output logic level indicates whether or not the data to be received exhibits the correct parity sense. For example, if 1ODD/is high (odd parity selected), 1PARITY is high, and there are three high bits on the 1B bus, then 1is low, indicating a parity error.
The 74ACT16657 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16657 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16657 is characterized for operation from -40°C to 85°C.
The 'ACT16657 contain two noninverting octal transceiver sections with separate parity generator/checker circuits and control signals. For either section, the transmit/receive (1T/R\ or 2T/R\) input determines the direction of data flow. When 1T/R\ (or 2T/R\) is high, data flows from the 1A (or 2A) port to the 1B (or 2B) port (transmit mode); when 1T/R\ (or 2T/R\) is low, data flows from the 1B (or 2B) port to the 1A (or 2A) port (receive mode). When the output-enable (1or 2) input is high, both the 1A (or 2A) and 1B (or 2B) ports are in the high-impedance state.
Odd or even parity is selected by a logic high or low level, respectively, on the 1ODD/(or 2ODD/) input. 1PARITY (or 2PARITY) carries the parity bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode.
In the transmit mode, after the 1A (or 2A) bus is polled to determine the number of high bits, 1PARITY (or 2PARITY) is set to the logic level that maintains the parity sense selected by the level at the 1ODD/(or 2ODD/) input. For example, if 1ODD/is low (even parity selected) and there are five high bits on the 1A bus, then 1PARITY is set to the logic high level so that an even number of the nine total bits (eight 1A-bus bits plus parity bit) are high.
In the receive mode, after the 1B (or 2B) bus is polled to determine the number of high bits, the 1(or 2) output logic level indicates whether or not the data to be received exhibits the correct parity sense. For example, if 1ODD/is high (odd parity selected), 1PARITY is high, and there are three high bits on the 1B bus, then 1is low, indicating a parity error.
The 74ACT16657 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16657 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16657 is characterized for operation from -40°C to 85°C. |
| Flip Flops | 1 | Active | |
74ACT1682318-Bit Bus-Interface Flip-Flops with 3-State Outputs | Logic | 2 | Active | 18-Bit Bus-Interface Flip-Flops with 3-State Outputs |
