| Integrated Circuits (ICs) | 1 | Obsolete | |
| Interface | 1 | Obsolete | |
PCI1520-EPEnhanced product PC card controllers data manual | Interface | 9 | Obsolete | The Texas Instruments PCI1520, a 208-terminal dual-slot CardBus controller designed to meet thePCI Bus Power Management Interface Specification for PCI to CardBus Bridges, is an ultralow-power high-performance PCI-to-CardBus controller that supports two independent card sockets compliant with thePC Card Standard(rev. 7.1). The PCI1520 provides features that make it the best choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1997PC Card Standardretains the 16-bit PC Card specification defined inPCI Local Bus Specificationand defines the new 32-bit PC Card, CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1520 supports any combination of 16-bit and CardBus PC Cards in the two sockets, powered at 5 V or 3.3 V, as required.
The PCI1520 is compliant with thePCI Local Bus Specification, and its PCI interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card bridging transactions. The PCI1520 is also compliant withPCI Bus Power Management Interface Specification(rev. 1.1).
All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1520 is register-compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The PCI1520 internal data path logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent buffering and a pipeline architecture provide an unsurpassed performance level with sustained bursting. The PCI1520 can also be programmed to accept fast posted writes to improve system-bus utilization.
Multiple system-interrupt signaling options are provided, including parallel PCI, parallel ISA, serialized ISA, and serialized PCI. Furthermore, general-purpose inputs and outputs are provided for the board designer to implement sideband functions. Many other features designed into the PCI1520, such as socket activity light-emitting diode (LED) outputs, are discussed in detail throughout the design specification.
An advanced complementary metal-oxide semiconductor (CMOS) process achieves low system power consumption while operating at PCI clock rates up to 33 MHz. Several low-power modes enable the host power management system to further reduce power consumption.
The Texas Instruments PCI1520, a 208-terminal dual-slot CardBus controller designed to meet thePCI Bus Power Management Interface Specification for PCI to CardBus Bridges, is an ultralow-power high-performance PCI-to-CardBus controller that supports two independent card sockets compliant with thePC Card Standard(rev. 7.1). The PCI1520 provides features that make it the best choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1997PC Card Standardretains the 16-bit PC Card specification defined inPCI Local Bus Specificationand defines the new 32-bit PC Card, CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1520 supports any combination of 16-bit and CardBus PC Cards in the two sockets, powered at 5 V or 3.3 V, as required.
The PCI1520 is compliant with thePCI Local Bus Specification, and its PCI interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card bridging transactions. The PCI1520 is also compliant withPCI Bus Power Management Interface Specification(rev. 1.1).
All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1520 is register-compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The PCI1520 internal data path logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent buffering and a pipeline architecture provide an unsurpassed performance level with sustained bursting. The PCI1520 can also be programmed to accept fast posted writes to improve system-bus utilization.
Multiple system-interrupt signaling options are provided, including parallel PCI, parallel ISA, serialized ISA, and serialized PCI. Furthermore, general-purpose inputs and outputs are provided for the board designer to implement sideband functions. Many other features designed into the PCI1520, such as socket activity light-emitting diode (LED) outputs, are discussed in detail throughout the design specification.
An advanced complementary metal-oxide semiconductor (CMOS) process achieves low system power consumption while operating at PCI clock rates up to 33 MHz. Several low-power modes enable the host power management system to further reduce power consumption. |
| Controllers | 2 | Obsolete | |
| Integrated Circuits (ICs) | 2 | Active | |
| Interface | 13 | Active | The Texas Instruments PCI2050B PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses operating at a maximum bus frequency of 66-MHz. Transactions occur between masters on one and targets on another PCI bus, and the PCI2050B bridge allows bridged transactions to occur concurrently on both buses. The bridge supports burst mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The PCI2050B bridge is compliant with thePCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per extension slot by creating hierarchical buses. The PCI2050B provides two-tier internal arbitration for up to nine secondary bus masters and may be implemented with an external bus arbiter.
The CompactPCI™ hot-swap extended PCI capability makes the PCI2050B bridge an ideal solution for multifunction compact PCI cards and adapting single function cards to hot-swap compliance.
The PCI2050B bridge is compliant with thePCI-to-PCI Bridge Specification(Revision 1.1). The PCI2050B bridge provides compliance forPCI Bus Power Management Interface Specification(Revision 1.1). The PCI2050B bridge has been designed to lead the industry in power conservation and data throughput. An advanced CMOS process achieves low system power consumption while operating at PCI clock rates up to 66-MHz.
The Texas Instruments PCI2050B PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses operating at a maximum bus frequency of 66-MHz. Transactions occur between masters on one and targets on another PCI bus, and the PCI2050B bridge allows bridged transactions to occur concurrently on both buses. The bridge supports burst mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The PCI2050B bridge is compliant with thePCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per extension slot by creating hierarchical buses. The PCI2050B provides two-tier internal arbitration for up to nine secondary bus masters and may be implemented with an external bus arbiter.
The CompactPCI™ hot-swap extended PCI capability makes the PCI2050B bridge an ideal solution for multifunction compact PCI cards and adapting single function cards to hot-swap compliance.
The PCI2050B bridge is compliant with thePCI-to-PCI Bridge Specification(Revision 1.1). The PCI2050B bridge provides compliance forPCI Bus Power Management Interface Specification(Revision 1.1). The PCI2050B bridge has been designed to lead the industry in power conservation and data throughput. An advanced CMOS process achieves low system power consumption while operating at PCI clock rates up to 66-MHz. |
| Integrated Circuits (ICs) | 3 | Obsolete | |
PCI225032-bit, 33-MHz PCI-to-PCI bridge, Compact PCI hot-swap friendly, 4-master | Evaluation Boards | 3 | Active | The Texas Instruments PCI2250 PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses. Transactions occur between masters on one PCI bus and targets on another PCI bus, and the PCI2250 allows bridged transactions to occur concurrently on both buses. The bridge supports burst-mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The PCI2250 bridge is compliant with the PCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per expansion slot by creating hierarchical buses. The PCI2250 provides two-tier internal arbitration for up to four secondary bus masters and may be implemented with an external secondary PCI bus arbiter.
The PCI2250 provides compact-PCI (CPCI) hot-swap extended capability, which makes it an ideal solution for multifunction compact-PCI cards and adapting single function cards to hot-swap compliance.
The PCI2250 bridge is compliant with the PCI-to-PCI Bridge Specification. It can be configured for positive decoding or subtractive decoding on the primary interface, and provides several additional decode options that make it an ideal bridge to custom PCI applications. Two extension windows are included, and the PCI2250 provides decoding of serial and parallel port addresses.
The PCI2250 is compliant with PCI Power Management Interface Specification Revisions 1.0 and 1.1. Also, the PCI2250 offers PCI CLKRUN bridging support for low-power mobile and docking applications. The PCI2250 has been designed to lead the industry in power conservation. An advanced CMOS process is utilized to achieve low system power consumption while operating at PCI clock rates up to 33 MHz.
The Texas Instruments PCI2250 PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses. Transactions occur between masters on one PCI bus and targets on another PCI bus, and the PCI2250 allows bridged transactions to occur concurrently on both buses. The bridge supports burst-mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The PCI2250 bridge is compliant with the PCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per expansion slot by creating hierarchical buses. The PCI2250 provides two-tier internal arbitration for up to four secondary bus masters and may be implemented with an external secondary PCI bus arbiter.
The PCI2250 provides compact-PCI (CPCI) hot-swap extended capability, which makes it an ideal solution for multifunction compact-PCI cards and adapting single function cards to hot-swap compliance.
The PCI2250 bridge is compliant with the PCI-to-PCI Bridge Specification. It can be configured for positive decoding or subtractive decoding on the primary interface, and provides several additional decode options that make it an ideal bridge to custom PCI applications. Two extension windows are included, and the PCI2250 provides decoding of serial and parallel port addresses.
The PCI2250 is compliant with PCI Power Management Interface Specification Revisions 1.0 and 1.1. Also, the PCI2250 offers PCI CLKRUN bridging support for low-power mobile and docking applications. The PCI2250 has been designed to lead the industry in power conservation. An advanced CMOS process is utilized to achieve low system power consumption while operating at PCI clock rates up to 33 MHz. |
| Unclassified | 4 | Obsolete | |
| Specialized | 1 | Obsolete | |
