Texas Instruments

The PCA9543A is a dual bidirectional translating switch controlled by the I2C bus. The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Either individual SCn/SDn channel or both channels can be selected, determined by the contents of the programmable control register. Two interrupt inputs (INT1–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the two interrupt inputs. An active-low reset (RESET) input allows the PCA9543A to recover from a situation where one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes both of the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage, which will be passed by the PCA9543A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5.5-V tolerant. The PCA9543A is a dual bidirectional translating switch controlled by the I2C bus. The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Either individual SCn/SDn channel or both channels can be selected, determined by the contents of the programmable control register. Two interrupt inputs (INT1–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the two interrupt inputs. An active-low reset (RESET) input allows the PCA9543A to recover from a situation where one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes both of the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage, which will be passed by the PCA9543A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5.5-V tolerant.

The PCA9544A is a 4-channel, bidirectional translating multiplexer controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. One SCL/SDA pair can be selected at a time, and this is determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the four interrupt inputs. A power-on reset function puts the registers in their default state and initializes the I2C state machine, with no channel selected. The pass gates of the switches are constructed such that the VCCpin can be used to limit the maximum high voltage, which will be passed by the PCA9544A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant. The PCA9544A is a 4-channel, bidirectional translating multiplexer controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. One SCL/SDA pair can be selected at a time, and this is determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the four interrupt inputs. A power-on reset function puts the registers in their default state and initializes the I2C state machine, with no channel selected. The pass gates of the switches are constructed such that the VCCpin can be used to limit the maximum high voltage, which will be passed by the PCA9544A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.

The PCA9545A is a quad bidirectional translating switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt (INT) output acts as an AND of the four interrupt inputs. An active-low reset (RESET) input allows the PCA9545A to recover from a situation in which one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCC terminal can be used to limit the maximum high voltage, which will be passed by the PCA9545A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O terminals are 5.5 V tolerant. The PCA9545A is a quad bidirectional translating switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt (INT) output acts as an AND of the four interrupt inputs. An active-low reset (RESET) input allows the PCA9545A to recover from a situation in which one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCC terminal can be used to limit the maximum high voltage, which will be passed by the PCA9545A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O terminals are 5.5 V tolerant.

The PCA9546A is a quad bidirectional translating switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. An active-low reset (RESET) input allows the PCA9546A to recover from a situation in which one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCCpin can be used to limit the maximum high voltage, which will be passed by the PCA9546A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5.5-V tolerant. The PCA9546A is a quad bidirectional translating switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. An active-low reset (RESET) input allows the PCA9546A to recover from a situation in which one of the downstream I2C buses is stuck in a low state. PullingRESETlow resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function. The pass gates of the switches are constructed such that the VCCpin can be used to limit the maximum high voltage, which will be passed by the PCA9546A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5.5-V tolerant.

The PCA9548A device has eight bidirectional translating switches that can be controlled through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. These downstream channels can be used to resolve I2C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0-7. The system master can reset the PCA9548A in the event of a time-out or other improper operation by asserting a low in theRESETinput. Similarly, the power-on reset deselects all channels and initializes the I2C/SMBus state machine. AssertingRESETcauses the same reset and initialization to occur without powering down the part. This allows recovery should once of the downstream I2C buses get stuck in a low state. The pass gates of the switches are constructed so that the VCCpin can be used to limit the maximum high voltage, which is passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant. The PCA9548A device has eight bidirectional translating switches that can be controlled through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. These downstream channels can be used to resolve I2C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0-7. The system master can reset the PCA9548A in the event of a time-out or other improper operation by asserting a low in theRESETinput. Similarly, the power-on reset deselects all channels and initializes the I2C/SMBus state machine. AssertingRESETcauses the same reset and initialization to occur without powering down the part. This allows recovery should once of the downstream I2C buses get stuck in a low state. The pass gates of the switches are constructed so that the VCCpin can be used to limit the maximum high voltage, which is passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.

The PCA9554A open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. INTcan be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9554A can remain a simple slave device. The device’s outputs (latched) have high-current drive capability for directly driving LEDs and low current consumption. Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight devices to share the same I2C bus or SMBus. The PCA9554A is pin-to-pin and I2C address compatible with the PCF8574A. However, software changes are required, due to the enhancements in the PCA9554A over the PCF8574A. The PCA9554A and PCA9554 are identical except for their fixed I2C address. This allows for up to 16 of these devices (8 of each) on the same I2C/SMBus. The PCA9554A open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. INTcan be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9554A can remain a simple slave device. The device’s outputs (latched) have high-current drive capability for directly driving LEDs and low current consumption. Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight devices to share the same I2C bus or SMBus. The PCA9554A is pin-to-pin and I2C address compatible with the PCF8574A. However, software changes are required, due to the enhancements in the PCA9554A over the PCF8574A. The PCA9554A and PCA9554 are identical except for their fixed I2C address. This allows for up to 16 of these devices (8 of each) on the same I2C/SMBus.

This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3V to 5.5V VCC operation. The device provides general-purpose remote I/O expansion for most microcontroller families through the I2C interface [serial clock (SCL) and serial data (SDA)]. The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system controller. The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption. The system controller can reset the PCA9557 in the event of a timeout or other improper operation by asserting a low in the active-low reset (RESET) input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without depowering the part. Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address, allowing up to eight devices to share the same I2C bus or SMBus. This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3V to 5.5V VCC operation. The device provides general-purpose remote I/O expansion for most microcontroller families through the I2C interface [serial clock (SCL) and serial data (SDA)]. The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system controller. The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption. The system controller can reset the PCA9557 in the event of a timeout or other improper operation by asserting a low in the active-low reset (RESET) input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without depowering the part. Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address, allowing up to eight devices to share the same I2C bus or SMBus.