Texas Instruments

The IWR6843AOP is an Antenna-on-Package (AOP) device that is an evolution within the single-chip radar device family from Texas Instruments (TI). This device enables unprecedented levels of integration in an extremely small form factor and is an ideal solution for low power, self-monitored, ultra-accurate radar systems in the industrial space. Multiple variants are currently available including Functional Safety-Compliant devices (SIL2) and non-functional safety devices. It integrates a DSP subsystem, which contains TI’s high-performance C674x DSP for the Radar Signal processing. The device includes a BIST processor subsystem, which is responsible for radio configuration, control, and calibration. Additionally, the device includes a user programmable Arm Cortex-R4F based for automotive interfacing. The Hardware Accelerator block (HWA) can perform radar processing and can offload the DSP in order to execute higher level algorithms. Simple programming model changes can enable a wide variety of sensor applications with the possibility of dynamic reconfiguration for implementing a multimode sensor. Additionally, the device is provided as a complete platform solution including reference hardware design, software drivers, sample configurations, API guide, and user documentation. The IWR6843AOP is an Antenna-on-Package (AOP) device that is an evolution within the single-chip radar device family from Texas Instruments (TI). This device enables unprecedented levels of integration in an extremely small form factor and is an ideal solution for low power, self-monitored, ultra-accurate radar systems in the industrial space. Multiple variants are currently available including Functional Safety-Compliant devices (SIL2) and non-functional safety devices. It integrates a DSP subsystem, which contains TI’s high-performance C674x DSP for the Radar Signal processing. The device includes a BIST processor subsystem, which is responsible for radio configuration, control, and calibration. Additionally, the device includes a user programmable Arm Cortex-R4F based for automotive interfacing. The Hardware Accelerator block (HWA) can perform radar processing and can offload the DSP in order to execute higher level algorithms. Simple programming model changes can enable a wide variety of sensor applications with the possibility of dynamic reconfiguration for implementing a multimode sensor. Additionally, the device is provided as a complete platform solution including reference hardware design, software drivers, sample configurations, API guide, and user documentation.

The IWRL6432 mmWave Sensor device is an integrated single chip mmWave sensor based on FMCW radar technology. The device is capable of operation in the 57GHz to 63.9GHz band and is partitioned into mainly four power domains: IWRL6432 is specifically designed to have separate control for each of the above-mentioned power domains to control the states (power ON or OFF) based on use case requirements. The device also features the capability to exercise various low-power states like sleep and deep sleep, where low-power sleep mode is achieved by clock gating and by turning off the internal IP blocks of the device. The device also provides the option of keeping some contents of the device, like Application image or RF profile retained in such scenarios. Additionally, the device is built with TI’s low power 45nm RF CMOS process and enables unprecedented levels of integration in an extremely small form factor. IWRL6432 is designed for low power, self-monitored, ultra-accurate radar systems in the industrial (and personal electronics) space for applications such as building/factory automation, commercial/residential security, personal electronics, presence/motion detection, and gesture detection/recognition for human machine interfaces The IWRL6432 mmWave Sensor device is an integrated single chip mmWave sensor based on FMCW radar technology. The device is capable of operation in the 57GHz to 63.9GHz band and is partitioned into mainly four power domains: IWRL6432 is specifically designed to have separate control for each of the above-mentioned power domains to control the states (power ON or OFF) based on use case requirements. The device also features the capability to exercise various low-power states like sleep and deep sleep, where low-power sleep mode is achieved by clock gating and by turning off the internal IP blocks of the device. The device also provides the option of keeping some contents of the device, like Application image or RF profile retained in such scenarios. Additionally, the device is built with TI’s low power 45nm RF CMOS process and enables unprecedented levels of integration in an extremely small form factor. IWRL6432 is designed for low power, self-monitored, ultra-accurate radar systems in the industrial (and personal electronics) space for applications such as building/factory automation, commercial/residential security, personal electronics, presence/motion detection, and gesture detection/recognition for human machine interfaces

These monolithic TTL programmable read-only memories (PROMs) feature titanium-tungsten (Ti-W) fuse links with each link designed to program in 20 microseconds. The Schottky-clamped versions of these PROMs offer considerable flexibility for upgrading existing designs or improving new designs as they feature full Schottky clamping for improved performance, low-current MOS-compatible p-n-p inputs, choice of bus-drive three-state or open-collector outputs, and improved chip-select access times. Data can be electronically programmed, as desired, at any bit location in accordance with the programming procedure specified. All PROMs are supplied with a low-logic level output condition stored at each bit location. The programming procedure open-circuits Ti-W metal links, which reverses the stored logic level at selected locations. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may late be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content. A low level at the chip-select input(s) enables each PROM. The opposite level at any chip-select input causes the outputs to be off. The three-state output offers the convenience of an open-collector with the speed of the totem-pole output; it can be bus-connected to other similar outputs yet it retains the fast rise time characteristic of the TTL totem-pole output. The open-collector offers the capability of direct interface with a data line having a passive pull up. A MJ suffix designates full-temperature circuits (formerly 54 family) and are characterized for operation over the full military temperature range of -55°C to 125°C. A J or N suffix designates commercial-temperature circuits (formerly 74 family) and are characterized for operation from 0°C to 70°C. These monolithic TTL programmable read-only memories (PROMs) feature titanium-tungsten (Ti-W) fuse links with each link designed to program in 20 microseconds. The Schottky-clamped versions of these PROMs offer considerable flexibility for upgrading existing designs or improving new designs as they feature full Schottky clamping for improved performance, low-current MOS-compatible p-n-p inputs, choice of bus-drive three-state or open-collector outputs, and improved chip-select access times. Data can be electronically programmed, as desired, at any bit location in accordance with the programming procedure specified. All PROMs are supplied with a low-logic level output condition stored at each bit location. The programming procedure open-circuits Ti-W metal links, which reverses the stored logic level at selected locations. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may late be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content. A low level at the chip-select input(s) enables each PROM. The opposite level at any chip-select input causes the outputs to be off. The three-state output offers the convenience of an open-collector with the speed of the totem-pole output; it can be bus-connected to other similar outputs yet it retains the fast rise time characteristic of the TTL totem-pole output. The open-collector offers the capability of direct interface with a data line having a passive pull up. A MJ suffix designates full-temperature circuits (formerly 54 family) and are characterized for operation over the full military temperature range of -55°C to 125°C. A J or N suffix designates commercial-temperature circuits (formerly 74 family) and are characterized for operation from 0°C to 70°C.

The 24 and 28 Series of monolithic TTL programmable read-only memories (PROMs) feature an expanded selection of standard and low-power PROMs. This expanded PROM family provides the system designer with considerable fexibility in upgrading existing designs or optimizing new designs. Featuring proven titanium-tungsten (Ti-W) fuse links with low-current MOS-compatible p-n-p inputs, all family members utilize a common programming technique designed to program each link with a 20-microsecond pulse. The 4096-bit and 8192-bit PROMs are offered in a wide variety of packages ranging from 18-pin 300 mil-wide thru 24 pin 600 mil-wide. The 16,384-bit PROMs provide twice the bit density of the 8192-bit PROMs and are provided in a 24 pin 600 mil-wide package. All PROMs are supplied with a logic-high output level stored at each bit location. The programming procedure will produce open-circuits in the Ti-W metal links, which reverses the stored logic level at the selected location. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may later be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content. Active level(s) at the chip-select inputs(s) (S or S\) enables all of the outputs. An inactiv elevel at any chip-select input causes all outputs to be in the three-state, or off condition. The 24 and 28 Series of monolithic TTL programmable read-only memories (PROMs) feature an expanded selection of standard and low-power PROMs. This expanded PROM family provides the system designer with considerable fexibility in upgrading existing designs or optimizing new designs. Featuring proven titanium-tungsten (Ti-W) fuse links with low-current MOS-compatible p-n-p inputs, all family members utilize a common programming technique designed to program each link with a 20-microsecond pulse. The 4096-bit and 8192-bit PROMs are offered in a wide variety of packages ranging from 18-pin 300 mil-wide thru 24 pin 600 mil-wide. The 16,384-bit PROMs provide twice the bit density of the 8192-bit PROMs and are provided in a 24 pin 600 mil-wide package. All PROMs are supplied with a logic-high output level stored at each bit location. The programming procedure will produce open-circuits in the Ti-W metal links, which reverses the stored logic level at the selected location. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may later be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content. Active level(s) at the chip-select inputs(s) (S or S\) enables all of the outputs. An inactiv elevel at any chip-select input causes all outputs to be in the three-state, or off condition.

The JFE150 is a Burr-Brown™ discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE150 features performance not previously available in older discrete JFET technologies. The JFE150 offers the maximum possible noise-to-power efficiency and flexibility, where the quiescent current can be set by the user and yields excellent noise performance for currents from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.8 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). The JFE150 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high-leakage, nonlinear, external diodes. The JFE150 can withstand a high drain-to-source voltage of 40 V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The device is offered in 5-pin SOT-23 and SC70 packages. The JFE150 is a Burr-Brown™ discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE150 features performance not previously available in older discrete JFET technologies. The JFE150 offers the maximum possible noise-to-power efficiency and flexibility, where the quiescent current can be set by the user and yields excellent noise performance for currents from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.8 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). The JFE150 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high-leakage, nonlinear, external diodes. The JFE150 can withstand a high drain-to-source voltage of 40 V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The device is offered in 5-pin SOT-23 and SC70 packages.

The JFE2140 is a Burr-Brown™ Audio, matched-pair discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE2140 features performance not previously available in older discrete JFET technologies. The JFE2140 offers excellent noise performance across all current ranges, where the quiescent current can be set by the user from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.9 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). In addition, the matching between JFETs is tested to ±4 mV, providing low offset and high CMRR performance for differential pair configurations. The JFE2140 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high leakage, nonlinear external diodes. The JFE2140 can withstand a high drain-to-source voltage of 40‑V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The JFE2140 is a Burr-Brown™ Audio, matched-pair discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE2140 features performance not previously available in older discrete JFET technologies. The JFE2140 offers excellent noise performance across all current ranges, where the quiescent current can be set by the user from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.9 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). In addition, the matching between JFETs is tested to ±4 mV, providing low offset and high CMRR performance for differential pair configurations. The JFE2140 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high leakage, nonlinear external diodes. The JFE2140 can withstand a high drain-to-source voltage of 40‑V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C.

The L293 and L293D devices are quadruple high-current half-H drivers. The L293 is designed to provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V. Both devices are designed to drive inductive loads such as relays, solenoids, DC and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply applications. Each output is a complete totem-pole drive circuit, with a Darlington transistor sink and a pseudo- Darlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. The L293 and L293D are characterized for operation from 0°C to 70°C. The L293 and L293D devices are quadruple high-current half-H drivers. The L293 is designed to provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V. Both devices are designed to drive inductive loads such as relays, solenoids, DC and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply applications. Each output is a complete totem-pole drive circuit, with a Darlington transistor sink and a pseudo- Darlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. The L293 and L293D are characterized for operation from 0°C to 70°C.