74AXC2T45Automotive dual-bit dual-supply bus transceiver with configurable voltage translation | Translators, Level Shifters | 4 | Active | The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.
The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.
The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. |
| Buffers, Drivers, Receivers, Transceivers | 3 | Active | The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245 is compatible with a single-supply system.
The SN74AXC4T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.
To put the level shifter I/Os in the high-impedance state during power up or power down, tie the xOE pins to VCCA through a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The design of the VCC isolation feature allows both I/O ports to enter a high-impedance state by disabling their outputs if either VCCA or VCCB is less than 100mV.
Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245 is compatible with a single-supply system.
The SN74AXC4T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.
To put the level shifter I/Os in the high-impedance state during power up or power down, tie the xOE pins to VCCA through a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The design of the VCC isolation feature allows both I/O ports to enter a high-impedance state by disabling their outputs if either VCCA or VCCB is less than 100mV.
Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. |
| Integrated Circuits (ICs) | 4 | Active | |
74AXC8T245Automotive 8-bit dual-supply bus transceiver w/ configurable voltage translation, 3-state output | Development Boards, Kits, Programmers | 6 | Active | The SN74AXC8T245-Q1 AEC-Q100 qualified device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.
The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.
The SN74AXC8T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
The SN74AXC8T245-Q1 device is designed so the control pins (DIR and OE) are referenced to VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.
To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.
The SN74AXC8T245-Q1 AEC-Q100 qualified device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.
The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.
The SN74AXC8T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
The SN74AXC8T245-Q1 device is designed so the control pins (DIR and OE) are referenced to VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.
To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor. |
74AXCH2T452-bit 0.65V to 3.6V AXC dual-supply bus transciever with bus-hold | Buffers, Drivers, Receivers, Transceivers | 2 | Active | The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.
The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.
The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. |
| Buffers, Drivers, Receivers, Transceivers | 2 | Active | The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCAand VCCBsupplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OEand 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOEpins should be tied to VCCAthrough a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioffcurrent. The Ioffprotection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCCisolation feature ensures that if either VCCAor VCCBis less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance. |
| Integrated Circuits (ICs) | 1 | Active | The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.
The device operates by using two independent power-supply rails (VCCAand VCCB) . Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH8T245 is compatible with a single-supply system.
The SN74AXCH8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
The SN74AXCH8T245 device is designed so the control pins (DIR andOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on all A and B ports respectively, independent of the direction control or output enable.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The VCCisolation feature ensures that if either VCCinput supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state. To ensure the high-impedance state of the level shifter I/Os during power up or power down,OEshould be tied to VCCAthrough a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.
The device operates by using two independent power-supply rails (VCCAand VCCB) . Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH8T245 is compatible with a single-supply system.
The SN74AXCH8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
The SN74AXCH8T245 device is designed so the control pins (DIR andOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCAor VCCB, the bus-hold circuitry always remains active on all A and B ports respectively, independent of the direction control or output enable.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The VCCisolation feature ensures that if either VCCinput supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state. To ensure the high-impedance state of the level shifter I/Os during power up or power down,OEshould be tied to VCCAthrough a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. |
| Integrated Circuits (ICs) | 2 | Active | |
| Buffers, Drivers, Receivers, Transceivers | 2 | Obsolete | |
| Integrated Circuits (ICs) | 4 | Active | |
