Texas Instruments

The TPIC6C596 device is a monolithic, medium-voltage, low-current, 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. WhenCLRis low, all registers in the device are cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. WhenGis held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. Outputs are low-side, open-drain DMOS transistors with output ratings of 33 V and 100 mA continuous sink-current capability. Each output provides a 250-mA maximum current limit at TC= 25°C. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2500 V of ESD protection when tested using the human body model and the 200-V machine model. The TPIC6C596 device is characterized for operation over the operating case temperature range of –40°C to 125°C. The TPIC6C596 device is a monolithic, medium-voltage, low-current, 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. WhenCLRis low, all registers in the device are cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. WhenGis held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. Outputs are low-side, open-drain DMOS transistors with output ratings of 33 V and 100 mA continuous sink-current capability. Each output provides a 250-mA maximum current limit at TC= 25°C. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2500 V of ESD protection when tested using the human body model and the 200-V machine model. The TPIC6C596 device is characterized for operation over the operating case temperature range of –40°C to 125°C.

The TPIC71002 is a two-channel squib driver for airbag deployment in automotive applications. Each channel consists of a high side and a low side switches with independent control logic for protection against inadvertent deployment. Both the high and the low side switches have internal current limits and over-temperature protection. The IC registers are used for two channel configuration, control and status monitoring. To prevent inadvertent deployment, the high and the low side switches are turned on only if the proper configuration sequence is used, two independent arming/safing inputs are active and multiple inputs to the deploy controller logic are at the correct level. The registers are programmed using a serial communication interface. To prevent excessive power dissipation the maximum active ON time for each channel is limited by programmable Firing Time Out Timer. In addition, a current limit register is used to program the maximum current through the switches during a deployment. The current limitation on the low side switch is larger than the corresponding high side switch. During deployment, the low side switch will be fully enhanced and operates in RDS_ON mode and the high side switch will be in the current regulation mode. IC diagnostic functions monitor deployment pin voltages to facilitate high-side switch test, low-side switch test, squib resistance measurements, squib leakage measurement to battery or ground or leakage between any squib channels. The squib leakage measurement does not require the squib load to be present and covers both Zx and ZMx pins. Diagnostic information is communicated through the AMX_OUT pin (for analog signals) and SPI mapped status registers (for status signals latched in digital core). The high-side and low-side squib drivers have a diagnostic level current limit and a deployment level current limit. The default current limit for high-side and low-side squib drivers is the diagnostic level current limit. The high-side switch deployment current limit for all high-side drivers can be set to either 1.2 A min or 1.75 A min (see Table 1) through SPI mapped registers and device EEPROM settings (see Table 2). The low-side switch deployment current limit is not programmable and is fixed to a level greater than the high-side driver current limit. The ON time duration for each individual squib driver can be programmed through SPI mapped registers. The deployment sequence requires a specific set of software commands combined with external hardware arming/safing logic inputs (TZ=H, IWD=L) to provide deployment capability. The turn-on sequence of the high-side and low-side drivers is software controlled via SPI commands. The turn-off procedure is automatically controlled by the deployment ASIC for the high side drivers, while the low side drivers turn-off procedure can be controlled by the deployment ASIC or by software via SPI commands. After the programmed ON time deployment has been achieved, the high-side driver is deactivated first. It is followed by the low-side driver deactivation after approximately 100usec (in case of hardware control turn-off sequence device configuration), or after SPI command for low side driver turn-off has been received from an external microcontroller (in case of software control turn-off sequence device configuration). The RESET_N is an active low input reset signal. This input is driven high (by the power supply unit and/or the external µC) once the external voltage supplies are within the specified limits. The external microcontroller is required to configure and control device through the serial communication interface. Reliable software is critical for the system operation. Extended deployment duration activates the over-temperature protection circuit and terminates deployment. If short-to-ground condition occurs during deployment, 35-V firing voltage is completely dropped across the HS_FET, thereby thermal shut down protection kicks in to protect the device. The TPIC71002 is a two-channel squib driver for airbag deployment in automotive applications. Each channel consists of a high side and a low side switches with independent control logic for protection against inadvertent deployment. Both the high and the low side switches have internal current limits and over-temperature protection. The IC registers are used for two channel configuration, control and status monitoring. To prevent inadvertent deployment, the high and the low side switches are turned on only if the proper configuration sequence is used, two independent arming/safing inputs are active and multiple inputs to the deploy controller logic are at the correct level. The registers are programmed using a serial communication interface. To prevent excessive power dissipation the maximum active ON time for each channel is limited by programmable Firing Time Out Timer. In addition, a current limit register is used to program the maximum current through the switches during a deployment. The current limitation on the low side switch is larger than the corresponding high side switch. During deployment, the low side switch will be fully enhanced and operates in RDS_ON mode and the high side switch will be in the current regulation mode. IC diagnostic functions monitor deployment pin voltages to facilitate high-side switch test, low-side switch test, squib resistance measurements, squib leakage measurement to battery or ground or leakage between any squib channels. The squib leakage measurement does not require the squib load to be present and covers both Zx and ZMx pins. Diagnostic information is communicated through the AMX_OUT pin (for analog signals) and SPI mapped status registers (for status signals latched in digital core). The high-side and low-side squib drivers have a diagnostic level current limit and a deployment level current limit. The default current limit for high-side and low-side squib drivers is the diagnostic level current limit. The high-side switch deployment current limit for all high-side drivers can be set to either 1.2 A min or 1.75 A min (see Table 1) through SPI mapped registers and device EEPROM settings (see Table 2). The low-side switch deployment current limit is not programmable and is fixed to a level greater than the high-side driver current limit. The ON time duration for each individual squib driver can be programmed through SPI mapped registers. The deployment sequence requires a specific set of software commands combined with external hardware arming/safing logic inputs (TZ=H, IWD=L) to provide deployment capability. The turn-on sequence of the high-side and low-side drivers is software controlled via SPI commands. The turn-off procedure is automatically controlled by the deployment ASIC for the high side drivers, while the low side drivers turn-off procedure can be controlled by the deployment ASIC or by software via SPI commands. After the programmed ON time deployment has been achieved, the high-side driver is deactivated first. It is followed by the low-side driver deactivation after approximately 100usec (in case of hardware control turn-off sequence device configuration), or after SPI command for low side driver turn-off has been received from an external microcontroller (in case of software control turn-off sequence device configuration). The RESET_N is an active low input reset signal. This input is driven high (by the power supply unit and/or the external µC) once the external voltage supplies are within the specified limits. The external microcontroller is required to configure and control device through the serial communication interface. Reliable software is critical for the system operation. Extended deployment duration activates the over-temperature protection circuit and terminates deployment. If short-to-ground condition occurs during deployment, 35-V firing voltage is completely dropped across the HS_FET, thereby thermal shut down protection kicks in to protect the device.

The TPIC71004-Q1 is a quad channel squib driver for airbags deployment in automotive applications. Each channel consists of a high side and a low side switch with independent control logic for protection against inadvertent deployment. Both the high and the low side switches have internal current limits, over-temperature protection. The IC registers are used for four channel configuration, control and status monitoring. To prevent inadvertent deployment, the high and the low side switches will be turned on only if the proper configuration sequence is used and multiple inputs to the deploy controller logic are at the correct level. The registers are programmed using a serial communications interface. The maximum on time for each channel is limited by programmable Firing Time Out Timer to prevent excessive power dissipation. In addition, a current limit register is used to program the maximum current through the switches during a deployment. The current limitation on the low side switch is larger than the corresponding high side switch. During deployment, the low side switch will be full enhanced and operate with RDS_ON mode and the high side switch will be in current regulation mode. The implemented diagnostic functions monitor deployment ASIC pin voltages to provide High Side switch test, Low Side switch test, squib resistance measurements, squib leakage measurement to battery, ground and between any squib channels. Furthermore, the squib leakage measurement is provided for both Zx and ZMx pins and does not require the squib load to be present to operate properly. Diagnostic information is communicated through the AMX_OUT pin (for analog signals) and SPI mapped status registers (for status signals latched in digital core). The high-side and low-side squib drivers have a diagnostic level current limit and a deployment level current limit. The default current limit for high-side and low-side squib drivers is the diagnostic level current limit. The high-side switch deployment current limit for all high-side drivers can be set to either 1.2 A min or 1.75 A min (see Table 1) through SPI mapped registers, device EEPROM settings (see Table 2). The low-side switch deployment current limit is not programmable and is fixed to a level greater than the high-side driver current limit. The ON time duration for each individual squib driver can be programmed through SPI mapped registers. The deployment sequence requires a specific set of software commands combined with external hardware enable logic lines (TZ0=H, IWD=L) to provide deployment capability. The turn-on sequence of the high-side driver and low-side drivers is software controlled via SPI commands, but the turn-off procedure is automatically provided by the deployment ASIC. After the programmed ON time duration has been achieved, the high-side switch is deactivated first then followed by the low-side driver deactivation by approximately 100µsec. The RESET_N is an active low input reset signal. This input will be released high by the power supply unit and/or the µC once the external voltage supplies are within the specified limits. The external microcontroller is required to configure and control device through the serial communication interface. Reliable software is critical for the system operation. The TPIC71004-Q1 is a quad channel squib driver for airbags deployment in automotive applications. Each channel consists of a high side and a low side switch with independent control logic for protection against inadvertent deployment. Both the high and the low side switches have internal current limits, over-temperature protection. The IC registers are used for four channel configuration, control and status monitoring. To prevent inadvertent deployment, the high and the low side switches will be turned on only if the proper configuration sequence is used and multiple inputs to the deploy controller logic are at the correct level. The registers are programmed using a serial communications interface. The maximum on time for each channel is limited by programmable Firing Time Out Timer to prevent excessive power dissipation. In addition, a current limit register is used to program the maximum current through the switches during a deployment. The current limitation on the low side switch is larger than the corresponding high side switch. During deployment, the low side switch will be full enhanced and operate with RDS_ON mode and the high side switch will be in current regulation mode. The implemented diagnostic functions monitor deployment ASIC pin voltages to provide High Side switch test, Low Side switch test, squib resistance measurements, squib leakage measurement to battery, ground and between any squib channels. Furthermore, the squib leakage measurement is provided for both Zx and ZMx pins and does not require the squib load to be present to operate properly. Diagnostic information is communicated through the AMX_OUT pin (for analog signals) and SPI mapped status registers (for status signals latched in digital core). The high-side and low-side squib drivers have a diagnostic level current limit and a deployment level current limit. The default current limit for high-side and low-side squib drivers is the diagnostic level current limit. The high-side switch deployment current limit for all high-side drivers can be set to either 1.2 A min or 1.75 A min (see Table 1) through SPI mapped registers, device EEPROM settings (see Table 2). The low-side switch deployment current limit is not programmable and is fixed to a level greater than the high-side driver current limit. The ON time duration for each individual squib driver can be programmed through SPI mapped registers. The deployment sequence requires a specific set of software commands combined with external hardware enable logic lines (TZ0=H, IWD=L) to provide deployment capability. The turn-on sequence of the high-side driver and low-side drivers is software controlled via SPI commands, but the turn-off procedure is automatically provided by the deployment ASIC. After the programmed ON time duration has been achieved, the high-side switch is deactivated first then followed by the low-side driver deactivation by approximately 100µsec. The RESET_N is an active low input reset signal. This input will be released high by the power supply unit and/or the µC once the external voltage supplies are within the specified limits. The external microcontroller is required to configure and control device through the serial communication interface. Reliable software is critical for the system operation.

The TPIC7218-Q1 device integrates in single package several functions needed in ABS and ESC electronic control units (ECU). This integration coupled with the minimization of the external components saves valuable ECU board space. The TPIC7218-Q1 device is an antilock braking controller capable of directly driving eight solenoid valves with internal high-current low-side drivers. Low-side drivers configured for digital control do not require external voltage clamps. The TPIC7218-Q1 device has gate drive capability for two high-side N-Channel MOSFETs that can be used to drive a pump motor and power to all solenoids. The TPIC7218-Q1 device provides a fault-tolerant interface for both Intelligent and Active wheel-speed sensors to an external microprocessor. The TPIC7218-Q1 device can be used with either 3.3- or 5-V microprocessors and uses a standard SPI (Serial-Peripheral Interface). The TPIC7218-Q1 device has two internal open-drain warning lamp drivers that can be pulled up to battery voltage, as well as one low-voltage driver. An internal state machine monitors a watchdog input and reports faults on a warning-lamp pin and SPI register. A K-Line transceiver is also included. A multitude of safety and fault monitoring functionality supervise both system and TPIC7218-Q1 circuits. Faults must be polled and reset over SPI. The TPIC7218-Q1 device is designed for use in harsh automotive environments, capable of withstanding high operating temperatures and electrically noisy signals and power. Short-to-ground, short-to-battery, and open-load conditions are tolerated and monitored. The TPIC7218-Q1 device also exhibits outstanding Electro-Magnetic Compatibility (EMC) performance. The TPIC7218-Q1 device integrates in single package several functions needed in ABS and ESC electronic control units (ECU). This integration coupled with the minimization of the external components saves valuable ECU board space. The TPIC7218-Q1 device is an antilock braking controller capable of directly driving eight solenoid valves with internal high-current low-side drivers. Low-side drivers configured for digital control do not require external voltage clamps. The TPIC7218-Q1 device has gate drive capability for two high-side N-Channel MOSFETs that can be used to drive a pump motor and power to all solenoids. The TPIC7218-Q1 device provides a fault-tolerant interface for both Intelligent and Active wheel-speed sensors to an external microprocessor. The TPIC7218-Q1 device can be used with either 3.3- or 5-V microprocessors and uses a standard SPI (Serial-Peripheral Interface). The TPIC7218-Q1 device has two internal open-drain warning lamp drivers that can be pulled up to battery voltage, as well as one low-voltage driver. An internal state machine monitors a watchdog input and reports faults on a warning-lamp pin and SPI register. A K-Line transceiver is also included. A multitude of safety and fault monitoring functionality supervise both system and TPIC7218-Q1 circuits. Faults must be polled and reset over SPI. The TPIC7218-Q1 device is designed for use in harsh automotive environments, capable of withstanding high operating temperatures and electrically noisy signals and power. Short-to-ground, short-to-battery, and open-load conditions are tolerated and monitored. The TPIC7218-Q1 device also exhibits outstanding Electro-Magnetic Compatibility (EMC) performance.

The TPIC74100 is a switch-mode regulator with integrated switches for voltage-mode control. With the aid of external components (LC combination), the device regulates the output to 5 V ±3% for a wide input-voltage range. The TPIC74100 offers a reset function to detect and indicate when the 5-V output rail is outside of the specified tolerance. This reset delay is programmable using an external timing capacitor on the REST pin. Additionally, an alarm (AOUT) feature is activated when the input supply rail Vdriveris below a prescaled specified value (set by the AINpin). The TPIC74100 has a frequency-modulation scheme to minimize EMI. The clock modulator permits a modulation of the switching frequency to reduce interference energy in the frequency band. The 5Vg output is a switched 5-V regulated output with internal current limiting to prevent RESET from being asserted when powering a capacitive load on the supply line. This function is controlled by the 5Vg_ENABLE pin. If there is a short to ground on this output (5Vg output), the output self-protects by operating in a chopping mode. This does, however, increase the output ripple voltage on VOUTduring this fault condition. The TPIC74100 is a switch-mode regulator with integrated switches for voltage-mode control. With the aid of external components (LC combination), the device regulates the output to 5 V ±3% for a wide input-voltage range. The TPIC74100 offers a reset function to detect and indicate when the 5-V output rail is outside of the specified tolerance. This reset delay is programmable using an external timing capacitor on the REST pin. Additionally, an alarm (AOUT) feature is activated when the input supply rail Vdriveris below a prescaled specified value (set by the AINpin). The TPIC74100 has a frequency-modulation scheme to minimize EMI. The clock modulator permits a modulation of the switching frequency to reduce interference energy in the frequency band. The 5Vg output is a switched 5-V regulated output with internal current limiting to prevent RESET from being asserted when powering a capacitive load on the supply line. This function is controlled by the 5Vg_ENABLE pin. If there is a short to ground on this output (5Vg output), the output self-protects by operating in a chopping mode. This does, however, increase the output ripple voltage on VOUTduring this fault condition.

The TPIC74101-Q1 is a switch-mode regulator with integrated switches for voltage-mode control. With the aid of external components (LC combination), the device regulates the output to 5 V ±2% for a wide input-voltage range. The TPIC74101-Q1 offers a reset function to detect and indicate when the 5-V output rail is outside of the specified tolerance. This reset delay is programmable using an external timing capacitor on the RESET Pin. Additionally, an alarm (AOUT) feature is activated when the input supply rail Vdriveris below a prescaled specified value (set by the AINpin). The TPIC74101-Q1 has a frequency-modulation scheme to minimize EMI. The clock modulator permits a modulation of the switching frequency to reduce interference energy in the frequency band. The 5Vg output is a switched 5-V regulated output with internal current limiting to prevent RESET from being asserted when powering a capacitive load on the supply line. This function is controlled by the 5Vg_ENABLE Pin. If there is a short to ground on this output (5Vg output), the output self-protects by operating in a chopping mode. This does, however, increase the output ripple voltage on VOUTduring this fault condition. The TPIC74101-Q1 is a switch-mode regulator with integrated switches for voltage-mode control. With the aid of external components (LC combination), the device regulates the output to 5 V ±2% for a wide input-voltage range. The TPIC74101-Q1 offers a reset function to detect and indicate when the 5-V output rail is outside of the specified tolerance. This reset delay is programmable using an external timing capacitor on the RESET Pin. Additionally, an alarm (AOUT) feature is activated when the input supply rail Vdriveris below a prescaled specified value (set by the AINpin). The TPIC74101-Q1 has a frequency-modulation scheme to minimize EMI. The clock modulator permits a modulation of the switching frequency to reduce interference energy in the frequency band. The 5Vg output is a switched 5-V regulated output with internal current limiting to prevent RESET from being asserted when powering a capacitive load on the supply line. This function is controlled by the 5Vg_ENABLE Pin. If there is a short to ground on this output (5Vg output), the output self-protects by operating in a chopping mode. This does, however, increase the output ripple voltage on VOUTduring this fault condition.