SN74AUP1T17Low Power, 1.8/2.5/3.3-V In, 3.3-V CMOS Out, Single Schmitt-Trigger Buffer Gate | Integrated Circuits (ICs) | 1 | Active | The SN74AUP1T17 performs the Boolean function Y = A with designation for logic-level translation applications with output referenced to supply VCC.
AUP technology is the industry–s lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply. This product also maintains excellent signal integrity.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.
Schmitt-trigger inputs (ΔVT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T17 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
The SN74AUP1T17 performs the Boolean function Y = A with designation for logic-level translation applications with output referenced to supply VCC.
AUP technology is the industry–s lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply. This product also maintains excellent signal integrity.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.
Schmitt-trigger inputs (ΔVT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T17 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. |
SN74AUP1T34-Q11-Bit Unidirectional Voltage-Level Translator, SN74AUP1T34-Q1 | Integrated Circuits (ICs) | 4 | Active | The SN74AUP1T34-Q1 device is a 1-bit noninverting translator that uses two separate configurable power-supply rails. It is a unidirectional translator from A to B. The A port is designed to track VCCA. VCCAaccepts supply voltages from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCBaccepts supply voltages from 0.9 V to 3.6 V. This allows for low-voltage translation between 1-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AUP1T34-Q1 is also fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if VCCAinput is at GND, the B port is in the high-impedance state. If VCCBinput is at GND, any input to the A side does not cause the leakage current even floating.
The SN74AUP1T34-Q1 device is a 1-bit noninverting translator that uses two separate configurable power-supply rails. It is a unidirectional translator from A to B. The A port is designed to track VCCA. VCCAaccepts supply voltages from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCBaccepts supply voltages from 0.9 V to 3.6 V. This allows for low-voltage translation between 1-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AUP1T34-Q1 is also fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if VCCAinput is at GND, the B port is in the high-impedance state. If VCCBinput is at GND, any input to the A side does not cause the leakage current even floating. |
| Logic | 6 | Active | AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T58 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T58 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T58 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.
AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T58 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T58 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T58 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. |
SN74AUP1T86Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, 2-Input Exclusive-OR Gate | Logic | 1 | Active | Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, 2-Input Exclusive-OR Gate |
| Integrated Circuits (ICs) | 6 | Active | AUP technology is the industrys lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (ΔVT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T97 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.
AUP technology is the industrys lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (ΔVT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T97 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. |
| Logic | 4 | Active | AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.
AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply.
The wide VCCrange of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.
Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCCor ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed.
Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.
The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. |
SN74AUP2G00-Q1Automotive 2-ch, 2-input, 0.8-V to 3.6-V low power NAND gates | Logic | 5 | Active | The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The SN74AUP2G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The SN74AUP2G00 performs the Boolean function Y =A • Bor Y =A+Bin positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUP2G022-ch, 2-input, 0.8-V to 3.6-V low power NOR gates | Integrated Circuits (ICs) | 2 | Active | The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The SN74AUP2G02 performs the Boolean function Y =A + Bor Y =A⋅Bin positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The SN74AUP2G02 performs the Boolean function Y =A + Bor Y =A⋅Bin positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
| Gates and Inverters | 3 | Active | The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see ). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 1).
The SN74AUP2G04 performs the Boolean function Y =Ain positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see ). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 1).
The SN74AUP2G04 performs the Boolean function Y =Ain positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
SN74AUP2G062-ch, 0.8-V to 3.6-V low power inverters with open-drain outputs | Gates and Inverters | 3 | Active | The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The output of the SN74AUP2G06 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
The output of the SN74AUP2G06 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
