SN74AUC2G02 Series

2-ch, 2-input, 0.8-V to 2.7-V high speed NOR gates

Catalog

2-ch, 2-input, 0.8-V to 2.7-V high speed NOR gates

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Logic Level - High [custom]	Number of Inputs	Max Propagation Delay @ V, Max CL	Number of Circuits	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Logic Type	Input Logic Level - Low [Max]	Current - Quiescent (Max) [Max]	Package / Case [y]	Package / Case	Package / Case [y]	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package
Texas Instruments SN74AUC2G02DCURG4	2.7 V	0.8 V	1.7 V	2	1.9 ns	2	Surface Mount	9 mA	9 mA	NOR Gate	0.7 V	10 µA	2.3 mm	8-VFSOP	0.091 in	85 °C	-40 °C
Texas Instruments SN74AUC2G02DCUR	2.7 V	0.8 V	1.7 V	2	1.9 ns	2	Surface Mount	9 mA	9 mA	NOR Gate	0.7 V	10 µA	2.3 mm	8-VFSOP	0.091 in	85 °C	-40 °C
Texas Instruments SN74AUC2G02DCTR	2.7 V	0.8 V	1.7 V	2	1.9 ns	2	Surface Mount	9 mA	9 mA	NOR Gate	0.7 V	10 µA				85 °C	-40 °C	SM8
Texas Instruments SN74AUC2G02YEPR	2.7 V	0.8 V	1.7 V	2	1.9 ns	2	Surface Mount	9 mA	9 mA	NOR Gate	0.7 V	10 µA		8-XFBGA DSBGA		85 °C	-40 °C	8-DSBGA
Texas Instruments SN74AUC2G02YZPR	2.7 V	0.8 V	1.7 V	2	1.9 ns	2	Surface Mount	9 mA	9 mA	NOR Gate	0.7 V	10 µA		8-XFBGA DSBGA		85 °C	-40 °C	8-DSBGA

Catalog

2-ch, 2-input, 0.8-V to 2.7-V high speed NOR gates

Key Features

• Available in the Texas Instruments NanoFree™ PackageOptimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal OperationIoffSupports Partial Power-Down-Mode OperationSub-1-V OperableMax tpdof 1.8 ns at 1.8 VLow Power Consumption, 10 µA at 1.8 V±8-mA Output Drive at 1.8 VLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)NanoFree is a trademark of Texas Instruments.Available in the Texas Instruments NanoFree™ PackageOptimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal OperationIoffSupports Partial Power-Down-Mode OperationSub-1-V OperableMax tpdof 1.8 ns at 1.8 VLow Power Consumption, 10 µA at 1.8 V±8-mA Output Drive at 1.8 VLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)NanoFree is a trademark of Texas Instruments.

Description

This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation. The SN74AUC2G02 performs the Boolean function Y =A + Bor Y =A•Bin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation. The SN74AUC2G02 performs the Boolean function Y =A + Bor Y =A•Bin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.