Texas Instruments

The ADC14C105 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC14C105 may be operated from a single +3.0V or +3.3V power supply and consumes low power. A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14C105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles. The ADC14C105 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C. The ADC14C105 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC14C105 may be operated from a single +3.0V or +3.3V power supply and consumes low power. A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14C105 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles. The ADC14C105 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

The ADC14L020 is a low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at 20 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L020 achieves 12.0 effective bits at nyquist and consumes just 150 mW at 20 MSPS . The Power Down feature reduces power consumption to 15 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L020 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process. The ADC14L020 is a low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at 20 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L020 achieves 12.0 effective bits at nyquist and consumes just 150 mW at 20 MSPS . The Power Down feature reduces power consumption to 15 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L020 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.

The ADC14L040 is a low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at 40 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L040 achieves 11.9 effective bits at nyquist and consumes just 235 mW at 40 MSPS . The Power Down feature reduces power consumption to 15 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L040 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process. The ADC14L040 is a low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at 40 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L040 achieves 11.9 effective bits at nyquist and consumes just 235 mW at 40 MSPS . The Power Down feature reduces power consumption to 15 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREFwith the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L040 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.

The ADC161S626 is a 16-bit successive-approximation register (SAR) Analog-to-Digital converter (ADC) with a maximum sampling rate of 250 kSPS. The ADC161S626 has a minimum signal span accuracy of ±0.003% over the temperate range of –40°C to +85°C. The converter features a differential analog input with an excellent common-mode signal rejection ratio of 85 dB, making the ADC161S626 suitable for noisy environments. The ADC161S626 operates with a single analog supply (VA) and a separate digital input/output (VIO) supply. VAcan range from 4.5 V to 5.5 V and VIOcan range from 2.7 V to 5.5 V. This allows a system designer to maximize performance and minimize power consumption by operating the analog portion of the ADC at a VAof 5 V while interfacing with a 3.3-V controller. The serial data output is binary 2’s complement and is SPI compatible. The performance of the ADC161S626 is ensured over temperature at clock rates of 1 MHz to 5 MHz and reference voltages of 2.5 V to 5.5 V. The ADC161S626 is available in a small 10-lead VSSOP package. The high accuracy, differential input, low power consumption, and small size make the ADC161S626 ideal for direct connection to bridge sensors and transducers in battery operated systems or remote data acquisition applications. The ADC161S626 is a 16-bit successive-approximation register (SAR) Analog-to-Digital converter (ADC) with a maximum sampling rate of 250 kSPS. The ADC161S626 has a minimum signal span accuracy of ±0.003% over the temperate range of –40°C to +85°C. The converter features a differential analog input with an excellent common-mode signal rejection ratio of 85 dB, making the ADC161S626 suitable for noisy environments. The ADC161S626 operates with a single analog supply (VA) and a separate digital input/output (VIO) supply. VAcan range from 4.5 V to 5.5 V and VIOcan range from 2.7 V to 5.5 V. This allows a system designer to maximize performance and minimize power consumption by operating the analog portion of the ADC at a VAof 5 V while interfacing with a 3.3-V controller. The serial data output is binary 2’s complement and is SPI compatible. The performance of the ADC161S626 is ensured over temperature at clock rates of 1 MHz to 5 MHz and reference voltages of 2.5 V to 5.5 V. The ADC161S626 is available in a small 10-lead VSSOP package. The high accuracy, differential input, low power consumption, and small size make the ADC161S626 ideal for direct connection to bridge sensors and transducers in battery operated systems or remote data acquisition applications.